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Dual-Bit Dual-Supply Bus Transceiver

SN74AVC2T244

ACTIVE

Product details

Parameters

Technology Family AVC Bits (#) 2 IOH (Max) (mA) -24 IOL (Max) (mA) 24 Rating Catalog open-in-new Find other Unidirectional voltage translators

Package | Pins | Size

X2SON (DQE) 8 1 mm² 1.4 x 1 X2SON (DQM) 8 2 mm² 1.8 x 1.2 open-in-new Find other Unidirectional voltage translators

Features

  • Wide Operating VCC Range of 0.9 V to 3.6 V
  • Low Static-Power Consumption, 6-µA Max ICC
  • Output Enable Feature Allows User to Disable Outputs to Reduce Power Consumption
  • ±24-mA Output Drive at 3.0 V
  • Ioff Supports Partial Power-Down-Mode Operation
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
  • Maximum Data Rates
    • 380 Mbps (1.8-V to 3.3-V Translation)
    • 200 Mbps (<1.8-V to 3.3-V Translation)
    • 200 Mbps (Translate to 2.5 V or 1.8 V)
    • 150 Mbps (Translate to 1.5 V)
    • 100 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 5000-V Human-Body Model (A114-A)
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Description

This 2-bit unidirectional translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 0.9 V to 3.6 V. This allows for low-voltage translation between 0.9-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V and 3.6-V voltage nodes. For the SN74AVC2T244, when the output-enable (OE) input is high, all outputs are placed in the high-impedance state. The SN74AVC2T244 is designed so that the OE input circuit is referenced to VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 17
Type Title Date
* Datasheet 2-Bit Undirectional Voltage Level Translator datasheet (Rev. B) Sep. 27, 2011
Selection guide Voltage translation buying guide Jun. 13, 2019
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) Apr. 30, 2015
User guide SN74AVC2T244EVM Sep. 19, 2011
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. A) Jul. 08, 2004
Application note Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
More literature LCD Module Interface Application Clip May 09, 2003
User guide AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) Aug. 20, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application note Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) Jul. 07, 1999
Application note AVC Logic Family Technology and Applications (Rev. A) Aug. 26, 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
25
Description

The SN74AVC2T244 is a 2-bit voltage level translator. This translator is a single direction voltage translator, with OE. When the output-enable (OE) input is high, all outputs are placed in the high-impedance state. The A port is designed to track VCCA. VCCA accepts any supply voltage from 0.9V to (...)

Features
  • 2-bit Unidirectional Voltage-level translator
  • Breakout board style EVM for prototype and evaluation

Design tools & simulation

SIMULATION MODEL Download
SCEM543.ZIP (55 KB) - IBIS Model

Reference designs

REFERENCE DESIGNS Download
Stereo Evaluation Module Reference Design of the Digital Input, Class-D, IV Sense Audio Amplifier
TIDA-01572 — This reference design provides a high-performance stereo audio subsystem for use in PC applications. It operates off a single supply, ranging from 4.5 V to 16 V, and features the TAS2770, a digital-input Class-D audio amplifier that provides excellent noise and distortion performance and is (...)
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Industrial Communications Gateway PROFINET IRT to PROFIBUS Master Reference Design
TIDEP-0075 — PROFINET is becoming the leading industrial Ethernet protocol in automation due to its high-speed, deterministic communications and enterprise connectivity. However, as the world’s most popular fieldbus, PROFIBUS’s importance and usage will continue for many years due to legacy (...)
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REFERENCE DESIGNS Download
OPC UA Data Access Server for AM572x Reference Design
TIDEP0078 — OPC UA is an industrial machine-to-machine protocol designed to allow interoperability and communication between all machines connected under Industry 4.0. The TIDEP0078 TI Design demonstrates use of the MatrikonOPC™ OPC UA server development kit (SDK) to allow communications using an OPC UA (...)
document-generic Schematic
REFERENCE DESIGNS Download
Single Chip Drive for Industrial Communications and Motor Control
TIDEP0025 This TI design implements a hardware interface solution based on the HEIDENHAIN EnDat 2.2 standard for position or rotary encoders. The platform also allows designers to implement real-time EtherCAT communications standards in a broad range of industrial automation equipment. It enables designers (...)
document-generic Schematic
REFERENCE DESIGNS Download
ARM MPU with Integrated BiSS C Master Interface Reference Design
TIDEP0022 Implementation of BiSS C Master protocol on Industrial Communication Sub-System (PRU-ICSS). The design provides full documentation and source code for Programmable Realtime Unit (PRU).
document-generic Schematic
REFERENCE DESIGNS Download
ARM MPU with Integrated HIPERFACE DSL Master Interface Reference Design
TIDEP0035 Implementation of HIPERFACE DSL Master protocol on Industrial Communication Sub-System (PRU-ICSS). The two wire interface allows for integration of position feedback wires into motor cable.  Complete solution consists of AM437x PRU-ICSS firmware and TIDA-00177 transceiver reference design.
document-generic Schematic
REFERENCE DESIGNS Download
EnDat 2.2 System Reference Design
TIDEP0050 The TIDEP0050 TI Design implements the EnDat 2.2 Master protocol stack and hardware interface solution based on the HEIDENHAIN EnDat 2.2 standard for position or rotary encoders. The design is composed of the EnDat 2.2 Master protocol stack, half-duplex communications using RS485 transceivers and (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
X2SON (DQE) 8 View options
X2SON (DQM) 8 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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