Automotive 4-bit 2-supply bus transceiver with 3-state outputs, independent direction control inputs
Product details
Parameters
Package | Pins | Size
Features
- AEC-Q100 Qualified for automotive applications
- Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
- Operating temperature from –40°C to +125°C
- Independent direction control pins to allow configurable up and down translation
- Glitch-free power supply sequencing
- Up to 310 Mbps support when translating from 1.8 V to 3.3 V
- VCC isolation feature
- If either VCC input is below 100 mV, all I/Os outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Compatible with AVC family level shifters
- Latch-up performance exceeds 100 mA per JESD 78, Class II
- ESD protection exceeds JEDEC JS-001
- 8000-V human-body model
- 1000-V charged-device model
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Description
The SN74AXC4T774-Q1 is a four-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXC4T774-Q1 is compatible with a single-supply system.
The SN74AXC4T774-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIRx). The output-enable input ( OE) is used to disable the outputs so the buses are effectively isolated. The SN74AXC4T774-Q1 device is designed so the control pins (DIRx and OE) are referenced to VCCA.
To ensure the high-impedance state of the level shifter I/Os during power up or power down, the OE pin should be tied to VCCA through a pullup resistor.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports are set to the high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

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Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | SN74AXC4T774-Q1 Auto 4-Bit Dual-Supply Bus Transceiver datasheet (Rev. C) | Oct. 24, 2020 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic and translation devices with included dual supply support
- Board has 9 sections that can be broken apart for a smaller form factor
Description
Features
- High speed SMB connector available
- Ground port for each header pin supports high speed measurement
- OE pin have the option of 10K Ω resistor pullup or pulldown
- Layout optimized for high speed connectivity
- EVM is SPI, JTAG Interface ready with A[1:3] to B[1:3] and B4 to A4 signal direction
Design tools & simulation
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
TSSOP (PW) | 16 | View options |
UQFN (RSV) | 16 | View options |
WQFN (BQB) | 16 | View options |
Ordering & quality
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- Material content
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Support & training
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