Product details

Technology Family F Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Number of channels (#) 8 IOL (Max) (mA) 64 IOH (Max) (mA) -15 ICC (Max) (uA) 75000 Input type Bipolar Output type 3-State Features Very high speed (tpd 5-10ns), Over-voltage tolerant inputs Rating Catalog
Technology Family F Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Number of channels (#) 8 IOL (Max) (mA) 64 IOH (Max) (mA) -15 ICC (Max) (uA) 75000 Input type Bipolar Output type 3-State Features Very high speed (tpd 5-10ns), Over-voltage tolerant inputs Rating Catalog
PDIP (N) 20 229 mm² 24.33 x 9.4 SOIC (DW) 20 132 mm² 12.8 x 10.3 SOP (NS) 20 98 mm² 12.6 x 7.8
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F241 and ´F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (active-low output-enable) inputs, and complementary OE and inputs.

The ´F240 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The SN74F240 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F240 is characterized for operation from 0°C to 70°C.

 

 

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F241 and ´F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (active-low output-enable) inputs, and complementary OE and inputs.

The ´F240 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The SN74F240 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F240 is characterized for operation from 0°C to 70°C.

 

 

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Technical documentation

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Type Title Date
* Data sheet Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. A) 01 Oct 1993
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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Simulation model

SN74F240 IBIS Model (Rev. A) SN74F240 IBIS Model (Rev. A)

Simulation model

SN74F240 Behavioral SPICE Model SN74F240 Behavioral SPICE Model

Package Pins Download
PDIP (N) 20 View options
SO (NS) 20 View options
SOIC (DW) 20 View options

Ordering & quality

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