SN74GTLP1394
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2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity

2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity - SN74GTLP1394
Datasheet
 

Models (2)

Title Category Type Date
SN74GTLP1394 IBIS Model (Rev. A) IBIS Model (Multiple Files) 22 Jul 2002
HSPICE Model of SN74GTLP1394 HSpice Model ZIP 08 Mar 2001

Design kits & evaluation modules (1)

Name Part# Type
Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, P, N, and DGV Packages 14-24-LOGIC-EVM Evaluation Modules & Boards