The SN54LS297 and SN74LS297 devices are designed to provide a simple, costeffective solution to highaccuracy, digital, phaselockedloop applications. These devices contain all the necessary circuits, with the exception of the dividebyN counter, to build first order phaselocked loops as described in Figure 1.
Both exclusiveOR (XORPD) and edgecontrolled (ECPD) phase detectors are provided for maximum flexibility.
Proper partitioning of the loop function, with many of the building blocks external to the package, makes it easy for the designer to incorporate ripple cancellation or to cascade to higher order phaselocked loops.
The length of the up/down K counter is digitally programmable according to the K counter function table. With A, B, C, and D all low, the K counter is disabled. With A high and B, C, and D low, the K counter is only three stages long, which widens the bandwidth or capture range and shortens the lock time of the loop. When A, B, C, and D are all programmed high, the K counter becomes seventeen stages long, which narrows the bandwidth or capture range and lengthens the lock time. Realtime control of loop bandwidth by manipulating the A through D inputs can maximize the overall performance of the digital phaselocked loop.FIGURE 1SIMPLIFIED BLOCK DIAGRAM
The 'LS297 can perform the classic firstorder phaselocked loop function without using analog components. The accuracy of the digital phaselocked loop (DPLL) is not affected by V_{CC} and temperature variations, but depends solely on accuracies of the K clock, I/D clock, and loop propagation delays. The I/D clock frequency and the dividebyN modulos will determine the center frequency of the DPLL. The center frequency is defined by the relationship f_{c} = I/D Clock /2N(Hz).
Part number  Order  Technology Family  VCC (Min) (V)  VCC (Max) (V)  Voltage (Nom) (V)  Bits (#)  F @ nom voltage (Max) (MHz)  ICC @ nom voltage (Max) (mA)  tpd @ nom Voltage (Max) (ns)  IOL (Max) (mA)  IOH (Max) (mA)  Operating temperature range (C)  Package Group 

SN74LS297 

LS  4.75  5.25  5  1  35  120  35  24  0.4  0 to 70  PDIP  16 