Product details

Integrated VCO Yes Output frequency (Min) (MHz) 10 Output frequency (Max) (MHz) 1344 Normalized PLL phase noise (dBc/Hz) -231 Current consumption (mA) 39 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -124
Integrated VCO Yes Output frequency (Min) (MHz) 10 Output frequency (Max) (MHz) 1344 Normalized PLL phase noise (dBc/Hz) -231 Current consumption (mA) 39 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -124
  • Any Frequency from 10 MHz to 1344 MHz
  • Low Phase Noise and Spurs
    • –123 dBc/Hz at 12.5 kHz Offset at 480 MHz
    • –145 dBc/Hz at 1 MHz Offset at 480 MHz
    • Normalized PLL Noise Floor of –231 dBc/Hz
    • Spurious Better Than –75 dBc/Hz
  • New FastLock to Reduce Lock Time
  • A Novel Technique to Remove Integer Boundary
    Spurs
  • Integrated 5-V Charge Pump and Output Divider
    for External VCO Operation
  • 2-, 4- and 8-Level or Arbitrary Level Direct Digital
    FSK Modulation
  • One TX/RX Output or Two Fanout Outputs
  • Crystal, XO or Differential Reference Clock Input
  • Low Current Consumption
    • 39-mA Typical Synthesizer Mode (Internal
      VCO)
    • 9-mA Typical PLL Mode (External VCO)
  • 24-Bit Fractional-N Delta Sigma Modulator
  • Any Frequency from 10 MHz to 1344 MHz
  • Low Phase Noise and Spurs
    • –123 dBc/Hz at 12.5 kHz Offset at 480 MHz
    • –145 dBc/Hz at 1 MHz Offset at 480 MHz
    • Normalized PLL Noise Floor of –231 dBc/Hz
    • Spurious Better Than –75 dBc/Hz
  • New FastLock to Reduce Lock Time
  • A Novel Technique to Remove Integer Boundary
    Spurs
  • Integrated 5-V Charge Pump and Output Divider
    for External VCO Operation
  • 2-, 4- and 8-Level or Arbitrary Level Direct Digital
    FSK Modulation
  • One TX/RX Output or Two Fanout Outputs
  • Crystal, XO or Differential Reference Clock Input
  • Low Current Consumption
    • 39-mA Typical Synthesizer Mode (Internal
      VCO)
    • 9-mA Typical PLL Mode (External VCO)
  • 24-Bit Fractional-N Delta Sigma Modulator

The LMX2571 is a low-power, high-performance, wideband PLLatinum RF synthesizer that integrates a delta-sigma fractional N PLL, multiple core voltage-controlled oscillator (VCO), programmable output dividers and two output buffers. The VCO cores work up to 5.376 GHz resulting in continuous output frequency range of 10 MHz to 1344 MHz.

This synthesizer can also be used with an external VCO. To that end, a dedicated 5-V charge pump and an output divider are available for this configuration.

A unique programmable multiplier is also incorporated to help improve spurs, allowing the system to use every channel even if it falls on an integer boundary.

The output has an integrated SPDT switch that can be used as a transmit/receive switch in FDD radio application. Both outputs can also be turned on to provide 2 outputs at the same time.

The LMX2571 supports direct digital FSK modulation through programming or pins. Discrete level FSK, pulse shaping FSK, and analog FM modulation are supported.

A new FastLock technique can be used allowing the user to step from one frequency to the next in less than 1.5 ms even when an external VCO is used with a narrow band loop filter.

The LMX2571 is a low-power, high-performance, wideband PLLatinum RF synthesizer that integrates a delta-sigma fractional N PLL, multiple core voltage-controlled oscillator (VCO), programmable output dividers and two output buffers. The VCO cores work up to 5.376 GHz resulting in continuous output frequency range of 10 MHz to 1344 MHz.

This synthesizer can also be used with an external VCO. To that end, a dedicated 5-V charge pump and an output divider are available for this configuration.

A unique programmable multiplier is also incorporated to help improve spurs, allowing the system to use every channel even if it falls on an integer boundary.

The output has an integrated SPDT switch that can be used as a transmit/receive switch in FDD radio application. Both outputs can also be turned on to provide 2 outputs at the same time.

The LMX2571 supports direct digital FSK modulation through programming or pins. Discrete level FSK, pulse shaping FSK, and analog FM modulation are supported.

A new FastLock technique can be used allowing the user to step from one frequency to the next in less than 1.5 ms even when an external VCO is used with a narrow band loop filter.

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Technical documentation

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Type Title Date
* Data sheet LMX2571 Low-Power, High-Performance PLLatinum RF Synthesizer with FSK Modulation datasheet (Rev. A) 01 Jun 2016
Technical article How to implement FM modulation 03 Aug 2017
Application note Frequency Shift Keying with LMX2571 30 May 2017
Selection guide TI Components for Aerospace and Defense Guide (Rev. E) 22 Mar 2017
Application note LMX2571 Using a Programmable Input Multiplier to Minimize Integer Boundary Spurs 12 Jan 2016
Technical article Timing is Everything: Improving integer boundary spurs in fractional PLL synthesizers 05 Aug 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LMX2571EVM — LMX2571 Evaluation Module

The LMX2571EVM is an evaluation board for the LMX2571 which is a frequency synthesizer with low noise, high performance integrated VCO. The VCO core is a low noise 5GHz VCO, after the output channel divider, the divided down frequencies are 10MHz to 1400MHz.

The internal VCO is bypassable, allowing (...)

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Application software & framework

PLLATINUMSIM-SW — Texas Instruments PLLatinum Simulator Tool

The PLLATINUMSIM-SW simulator tool lets you create detailed designs and simulations of our PLLATINUM™ integrated circuits which include the LMX series of PLLs and synthesizers.
Application software & framework

TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software

The TICS Pro software is used to program the evaluation modules (EVMs) for device numbers with these prefixes: CDC, LMK and LMX. These devices include PLLs and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Reference designs

TIDA-00886 — Low Power RF PLL-Synthesizer Operating From a Single Cell Battery Reference Design

The TIDA-00886 consists of the LMX2571,  high-performance, wideband PLLatinum™ low-power RF synthesizer, powered by a single cell battery using TPS63050 a DC-DC buck-boost converter.  The TIDA-00886 shows that the DC-DC buck-boost converter has a small to negligible effect on (...)
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