SN74LV373A

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Octal Transparent D-Type Latches With 3-State Outputs

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Product details

Parameters

Technology Family LV-A Input type Standard CMOS Output type 3-State VCC (Min) (V) 2 VCC (Max) (V) 5.5 Channels (#) 8 Clock Frequency (Max) (MHz) 70 ICC (uA) 20 IOL (Max) (mA) 16 IOH (Max) (mA) -16 Features Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff) Rating Catalog open-in-new Find other D-type latch

Package | Pins | Size

SOIC (DW) 20 132 mm² 12.8 x 10.3 SOP (NS) 20 98 mm² 12.6 x 7.8 SSOP (DB) 20 38 mm² 5.3 x 7.2 TSSOP (PW) 20 42 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4 VQFN (RGY) 20 16 mm² 3.5 x 4.5 open-in-new Find other D-type latch

Features

  • 2-V to 5.5-V VCC Operation
  • Maximum tpd of 8.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support Mixed-Mode Voltage Operation on
    All Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 3000-V Human-Body Model
    • 200-V Machine Model
    • 2000-V Charged-Device Model
open-in-new Find other D-type latch

Description

The SN74LV373A device is an octal transparent D-type latch designed for 2-V to 5.5-V VCC operation.

open-in-new Find other D-type latch
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Technical documentation

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Type Title Date
* Datasheet SN74LV373A Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. L) Aug. 01, 2016
Application notes Power-Up Behavior of Clocked Devices (Rev. A) Feb. 06, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODELS Download
SCEM141A.ZIP (18 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
SO (NS) 20 View options
SOIC (DW) 20 View options
SSOP (DB) 20 View options
TSSOP (PW) 20 View options
TVSOP (DGV) 20 View options
VQFN (RGY) 20 View options

Ordering & quality

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