Home Logic & voltage translation Flip-flops, latches & registers D-type flip-flops
Home
Logic & voltage translation
Flip-flops, latches & registers
D-type flip-flops

SN74S74

ACTIVE

Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clear

Order now
Data sheet

SN74S74

ACTIVE
Order now

Product details

Number of channels 2 Technology family S Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 50 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (µA) 25000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 2 Technology family S Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 50 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (µA) 25000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
  • Dependable Texas Instruments Quality and Reliability

 
  • Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
  • Dependable Texas Instruments Quality and Reliability

 

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.

The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

 

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.

The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

 
filter Find other D-type flip-flops
Download

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device.
CD74AC74 ACTIVE Dual positive-edge-triggered D-type flip-flops with clear and preset Voltage range 2V to 6V, average propagation delay 7ns, average drive strength 24mA
CD74HC74 ACTIVE High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA

Technical documentation

No results found. Please clear your search and try again.
View all 1
Top documentation Type Title Format options Date
* Data sheet Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear datasheet Mar 1, 1988

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​