2.95 V to 6 V input, 3 A, 2 MHz SWIFT™ synchronous step-down converter in a 3 mm x 3 mm QFN package


Product details


Vin (Min) (V) 2.95 Vin (Max) (V) 6 Vout (Min) (V) 0.8 Vout (Max) (V) 4.5 Iout (Max) (A) 3 Iq (Typ) (uA) 360 Switching frequency (Min) (kHz) 300 Switching frequency (Max) (kHz) 2000 Features Enable, Frequency Synchronization, Power Good, Synchronous Rectification, Tracking, Soft Start Adjustable Operating temperature range (C) -40 to 150 Rating Catalog Regulated outputs (#) 1 open-in-new Find other Buck converters (integrated switch)

Package | Pins | Size

WQFN (RTE) 16 9 mm² 3 x 3 open-in-new Find other Buck converters (integrated switch)


  • Two 45-m (typical) MOSFETs for High Efficiency at 3-A Loads
  • 300kHz to 2MHz Switching Frequency
  • 0.8 V ± 3.0% Voltage Reference Over Temperature (0°C to 85°C)
  • Synchronizes to External Clock
  • Adjustable Slow Start/Sequencing
  • UV and OV Power Good Output
  • –40°C to 150°C Operating Junction Temperature Range
  • Thermally Enhanced 3mm × 3mm 16-pin QFN
  • Pin Compatible to TPS54318
    • Low-Voltage, High-Density Power Systems
    • Point-of-Load Regulation for Consumer Applications such as Set Top Boxes,
      LCD Displays, CPE Equipment

SWIFT, SwitcherPro are trademarks of Texas Instruments.

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The TPS54319 device is a full featured 6 V, 3 A, synchronous step down current mode converter with two integrated MOSFETs.

The TPS54319 enables small designs by integrating the MOSFETs, implementing current mode control to reduce external component count, reducing inductor size by enabling up to 2 MHz switching frequency, and minimizing the IC footprint with a small 3mm × 3mm thermally enhanced QFN package.

The TPS54319 provides accurate regulation for a variety of loads with an accurate ±3.0% Voltage Reference (VREF) over temperature.

Efficiency is maximized through the integrated 45m MOSFETs and 360µA typical supply current. Using the enable pin, shutdown supply current is reduced to 2 µA by entering a shutdown mode.

Under voltage lockout is internally set at 2.6 V, but can be increased by programming the threshold with a resistor network on the enable pin. The output voltage startup ramp is controlled by the slow start pin. An open drain power good signal indicates the output is within 93% to 107% of its nominal voltage.

Frequency fold back and thermal shutdown protects the device during an over-current condition.

The TPS54319 is supported in the SwitcherPro™ Software Tool at

For more SWIFT™ documentation, see the TI website at

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Technical documentation

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Type Title Date
* Data sheet 2.95 V to 6 V Input, 3-A Output, 2MHz, Synchronous Step Down Switcher With Integ datasheet Jan. 28, 2010
White paper Abwägungen und Verfahren zur Herstellung höherer Leistungsdichten Jul. 31, 2020
White paper 전력 밀도의 장단점과 기술 이해 Jul. 31, 2020
White paper 了解提升功率密度的權衡與 技術 Jul. 27, 2020
White paper Understanding the trade-offs and technologies to increase power density Jul. 02, 2020
Technical article Minimize the impact of the MLCC shortage on your power application Mar. 29, 2019
Technical article Smaller size now possible in 3A point-of-load converters Jun. 03, 2015
Application note Designing Type III Compensation for Current Mode Step-Down Converters (Rev. A) Sep. 15, 2010
User guide TPS54319EVM-626 3-A, SWIFT Regulator Evaluation Module May 19, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The ADS58J64EVM is an evaluation board used to evaluate the ADS58J64 Integrated Receiver from Texas Instruments. The ADS58J64 is a low power, 14-bit, 500-MSPS, quad channel telecom receiver with a buffered analog input. The device supports JESD204B interface and data rates up to 10Gbps. The EVM has (...)

  • Transformer-coupled signal input network, allows a single-ended signal source to the EVM
  • On board system clock generator (LMK04828) generates the FPGA reference clock, ADC sampling clock and SYSREFs for the high-speed JESD204B serial interface
  • Default transformer-coupled clock input network enables (...)
document-generic User guide
The TPS54319EVM-626 is a fully assembled and tested circuit for evaluating the TPS54319 2.95V to 6V input 3A synchronous buck converter. There are terminal blocks for input and output. Additional test points are also provided.
  • Integrated 45mW MOSFETs
  • 0.827V Reference with 3% Accuracy over Temperature
  • 200KHz to 2MHz Adjustable Switching Frequency
  • Integrated Tracking Pin
  • Pin compatible with 3-A TPS54318

Design tools & simulation

SLIM292B.ZIP (41 KB) - PSpice Model
SLVM373A.ZIP (136 KB) - PSpice Model
SLVM466.ZIP (55 KB) - TINA-TI Spice Model
SLVM467.TSC (218 KB) - TINA-TI Reference Design
SLVM488.ZIP (7 KB) - TINA-TI Spice Model
SLVM489.TSC (261 KB) - TINA-TI Reference Design
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
TPS54620 & TPS54XXX Current-Mode Step-Down Converter Design Calculator
TPS54620DESIGN-CALC — The Design Calculator Plus Application Note (SLVA352A) Calculator Tool calculates the critical external component values for the TPS54620/TPS54622/TPS54521/TPS54320/TPS54618/TPS54418/TPS54318/TPS54218/TPS54319. The calculator includes power stage design, feature design and Type II and Type III (...)

Reference designs

Wideband Receiver Reference Design for Upstream DOCSIS 3.1 Applications
TIDA-01378 — This reference design consists of an analog front-end (AFE) signal chain for wideband receiver applications using the LMH2832 digitally controlled variable gain amplifier (DVGA) and ADS54J40 analog-to-digital converter (ADC). The design is primarily targeted for upstream DOCSIS 3.1 receiver (...)
document-generic Schematic document-generic User guide
Low Voltage High Frequency Synchronous Buck Converter (3.3Vin to 2.5V@3A) Reference Design
PMP5832 The PMP5832 reference design provides a number of outputs that were designed to complete an entire system.  These parts can be used together or individually for a number of different applications.  These could be Automotive, Industrial, Consumer, etc.  The schematic, test report and (...)

CAD/CAE symbols

Package Pins Download
WQFN (RTE) 16 View options

Ordering & quality

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