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TIDA-01015

4 GHz Clock Reference Design for 12 Bit High Speed ADCs in Digital Oscilloscopes & Wireless Testers

Design files

TIDA-01015

Design files

Overview

The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input bandwidth of 3.2 GHz capable of capturing signals up to 4 GHz. This design highlights a clocking solution for the ADC12J4000 using TRF3765, to achieve high SNR performance at high input frequencies used in applications such as digital storage oscilloscopes (DSO) and wireless testers.

Features
  • 12-bit, 4-GSPS RF sampling ADC clocking solution
  • Up to 4-GHz input signal capture capability
  • JESD204B compliant low-phase noise clocking solution for RF sampling ADC
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Design files & products

Design files

Download ready-to-use system files to speed your design process.

download Design guide — TIDA-01015
TIDUCP0.PDF (929 KB)

Reference design overview and verified performance test data

download Assembly drawing — TIDA-01015
TIDRP57.PDF (1635 KB)

Detailed overview of design layout for component placement

download Bill of materials (BOM) — TIDA-01015
TIDRP56.PDF (70 KB)

Complete listing of design components, reference designators, and manufacturers/part numbers

download CAD/CAE symbol — TIDA-01015
TIDRP59.ZIP (10463 KB)

Files used for 3D models or 2D drawings of IC components

download Gerber file — TIDA-01015
TIDCD06.ZIP (713 KB)

Design file that contains information on physical board layer of design PCB

download PCB layout — TIDA-01015
TIDRP58.PDF (2245 KB)

PCB layer plot file used for generating PCB design layout

download Schematic — TIDA-01015
TIDRP55.PDF (399 KB)

Detailed schematic diagram for design layout and components

Products

Includes TI products in the design and potential alternatives.

RF PLLs & synthesizers

TRF3765 — 300M-4800MHz Low Noise Integer-N/Fractional-N PLL with Integrated VCO and up to 8 Outputs

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS74901 — 3-A, low-VIN (0.8-V) adjustable ultra-low-dropout voltage regulator with power good and enable

Data sheet: PDF | HTML
Clock jitter cleaners

LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet: PDF | HTML
Noninverting buffers & drivers

SN74LVC1G125 — Single 1.65-V to 5.5-V buffer with 3-state outputs

Data sheet: PDF | HTML
High-speed ADCs (≥10 MSPS)

ADC12J4000 — 12-Bit, 4.0-GSPS, RF Sampling Analog-to-Digital Converter (ADC)

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TLV702 — 300-mA, high-PSRR, low-IQ, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
DC/DC converters

TPS54327 — 4.5V to 18V Input, 3-A Synchronous Step-Down Converter

Data sheet: PDF | HTML
Voltage translators

SN74AVC4T774 — Four-bit dual-supply bus transceiver with configurable voltage-level shifting and tri-state outputs

Data sheet: PDF | HTML

Start development

Hardware development

Evaluation board

ADC12J4000EVM — ADC12J4000 12-Bit, 4.0-GSPS, RF Sampling Analog-to-Digital Converter Evaluation Module

The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input (...)
EVM user’s guide: PDF
Supported products & hardware

Supported products & hardware

Hardware development
Reference design
TIDA-00359 — Clocking Solution Reference Design for GSPS ADCs TIDA-01015 — 4 GHz Clock Reference Design for 12 Bit High Speed ADCs in Digital Oscilloscopes & Wireless Testers TIDA-01017 — High Speed Multi-Channel ADC Clock Reference Design for Oscilloscopes, Wireless Testers and Radars
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ADC12J4000EVM — ADC12J4000 12-Bit, 4.0-GSPS, RF Sampling Analog-to-Digital Converter Evaluation Module

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Hardware development
Reference design
TIDA-00359 — Clocking Solution Reference Design for GSPS ADCs TIDA-01015 — 4 GHz Clock Reference Design for 12 Bit High Speed ADCs in Digital Oscilloscopes & Wireless Testers TIDA-01017 — High Speed Multi-Channel ADC Clock Reference Design for Oscilloscopes, Wireless Testers and Radars
TI’s Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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* Design guide 4GHz Clock for 12Bit High Speed ADCs in DSO and Wireless Testers Ref Design Dec 14, 2016

Related design resources

Reference designs

REFERENCE DESIGN
TIDA-00359 — Clocking Solution Reference Design for GSPS ADCs TIDA-01016 — Clocking Reference Design for RF Sampling ADCs in Signal Analyzers and Wireless Testers TIDA-01017 — High Speed Multi-Channel ADC Clock Reference Design for Oscilloscopes, Wireless Testers and Radars TIDA-01021 — Multi-channel JESD204B 15-GHz clocking reference design for DSO, radar and 5G wireless testers TIDA-01022 — Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems TIDA-01023 — High Channel Count JESD204B Clock Generation Reference Design for RADAR and 5G Wireless Testers TIDA-01024 — High Channel Count JESD204B Daisy Chain Clock Reference Design for RADAR and 5G Wireless Testers

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