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Product details

Parameters

Function USB2 USB speed (Mbps) 480 Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other USB hubs & controllers

Package | Pins | Size

VQFN (RHB) 32 25 mm² 5 x 5 open-in-new Find other USB hubs & controllers

Features

  • USB2.0 PHY Transceiver Chip, Designed to Interface With a USB Controller Through a ULPI Interface, Fully Compliant With:
    • Universal Serial Bus Specification Rev. 2.0
    • On-The-Go Supplement to the USB 2.0 Specification Rev. 1.3
    • UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1
    • ULPI 12-pin SDR Interface
  • DP/DM Line External Component Compensation (Patent #US7965100 B1)
  • Interfaces to Host, Peripheral and OTG Device Cores; Optimized for Portable Devices or System ASICs With Built-in USB OTG Device Core
  • Complete USB OTG Physical Front-End That Supports Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)
  • VBUS Overvoltage Protection Circuitry Protects VBUS Pin in Range –2 V to 20 V
  • Internal 5-V Short-Circuit Protection of DP, DM, and ID Pins for Cable Shorting to VBUS Pin
  • ULPI Interface:
    • I/O Interface (1.8 V) Optimized for Nonterminated 50-Ω Line Impedance
    • ULPI CLOCK Pin (60 MHz) Supports Both Input and Output Clock Configurations
    • Fully Programmable ULPI-Compliant Register Set
  • Full Industrial Grade Operating Temperature Range From –40°C to 85°C
  • Available in a 32-Pin Quad Flat No Lead [QFN (RHB)] Package

All trademarks are the property of their respective owners.

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Description

The TUSB1210 is a USB2.0 transceiver chip, designed to interface with a USB controller through a ULPI interface. The device supports all USB2.0 data rates (high-speed 480 Mbps, full-speed 12 Mbps, and low-speed 1.5 Mbps), and is compliant to both host and peripheral modes. The device additionally supports a UART mode and legacy ULPI serial modes. TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including HNP and SRP.

The DP/DM external component compensation in the transmitter compensates for variations in the series impendence in order to match with the data line impedance and the receiver input impedance, to limit data reflections and thereby improve eye diagrams.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet TUSB1210 Stand-Alone USB Transceiver Chip Silicon datasheet (Rev. I) Jul. 06, 2015
* Errata TUSB1210 Errata Jan. 20, 2011
White papers A primer on USB Type-C and Power Delivery applications and requirements Nov. 15, 2016
User guides TUSB1210 EVM User's Guide Sep. 17, 2014
Application notes TUSB121x USB2.0 Board Guidelines Oct. 13, 2011

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

To get started developing with this LaunchPad:
Step 1: Buy the MSP-EXP432P401R LaunchPad
Step 2: Download the MSP432 SDK
Step 3: Complete the Out-of-Box experience and take the SimpleLink Academy trainings

The SimpleLink™ MSP432P401R LaunchPad™ development kit enables you to develop (...)

Features
  • Low-power, high performance MSP432P401R MCU
    • 48MHz 32-bit ARM Cortex M4F with Floating Point Unit and DSP acceleration
    • Power consumption: 80uA/MHz active and 660nA RTC standby operation
    • Digital: Advanced Encryption Standard (AES256) Accelerator, CRC, DMA, HW MPY32
    • Memory: 256KB Flash, 64KB RAM
    • Timers: 4 (...)
EVALUATION BOARDS Download
document-generic User guide
149
Description
The TUSB1210EVM implements a USB PHY with a ULPI interface. It can support Host, Device, OTG modes and also have output voltage support at the ULPI interface for +1.8V. This EVM also acts as a hardware reference design for any implementation of the TUSB1210.
Features
  • Plug and play design
  • CPEN active high digital output to control the external +5V Vbus
  • REFCLK terminal to determine the clock mode
  • Chip Select terminal to set the device in power down
  • ID terminal of the USB connector. HOST or OTG mode

Design tools & simulation

SIMULATION MODELS Download
SLLM184.ZIP (147 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
VQFN (RHB) 32 View options

Ordering & quality

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