Produktdetails

Number of full bridges 1/2 Vs (min) (V) 5.5 Vs ABS (max) (V) 47 Sleep current (µA) 14 Control mode Independent 1/2-Bridge, PWM Control interface Hardware (GPIO), SPI Features Current Regulation, Current sense Amplifier, Smart Gate Drive Rating Automotive Operating temperature range (°C) -40 to 125
Number of full bridges 1/2 Vs (min) (V) 5.5 Vs ABS (max) (V) 47 Sleep current (µA) 14 Control mode Independent 1/2-Bridge, PWM Control interface Hardware (GPIO), SPI Features Current Regulation, Current sense Amplifier, Smart Gate Drive Rating Automotive Operating temperature range (°C) -40 to 125
VQFN (RHB) 32 25 mm² 5 x 5
  • AEC-Q100 Qualified for Automotive Applications
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
  • Single Half-Bridge Gate Driver
    • Drives Two External N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • 5.5 to 45-V Operating Supply-Voltage Range
  • PWM Control Interface
  • Serial Interface for Configuration (DRV8703D-Q1)
  • Smart Gate Drive Architecture
    • Adjustable Slew-Rate Control
  • Supports 1.8-V, 3.3-V, and 5-V logic inputs
  • Current-Shunt Amplifier
  • Integrated PWM Current Regulation
  • Low-Power Sleep Mode
  • Protection Features
    • Supply Undervoltage Lockout (UVLO)
    • Charge-Pump Undervoltage (CPUV) Lockout
    • Overcurrent Protection (OCP)
    • Gate-Driver Fault (GDF)
    • Thermal Shutdown (TSD)
    • Watchdog Timer (DRV8703D-Q1)
    • Fault-Condition Output (nFAULT)
  • AEC-Q100 Qualified for Automotive Applications
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
  • Single Half-Bridge Gate Driver
    • Drives Two External N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • 5.5 to 45-V Operating Supply-Voltage Range
  • PWM Control Interface
  • Serial Interface for Configuration (DRV8703D-Q1)
  • Smart Gate Drive Architecture
    • Adjustable Slew-Rate Control
  • Supports 1.8-V, 3.3-V, and 5-V logic inputs
  • Current-Shunt Amplifier
  • Integrated PWM Current Regulation
  • Low-Power Sleep Mode
  • Protection Features
    • Supply Undervoltage Lockout (UVLO)
    • Charge-Pump Undervoltage (CPUV) Lockout
    • Overcurrent Protection (OCP)
    • Gate-Driver Fault (GDF)
    • Thermal Shutdown (TSD)
    • Watchdog Timer (DRV8703D-Q1)
    • Fault-Condition Output (nFAULT)

The DRV870xD-Q1 devices are small half bridge gate drivers that use two external N-channel MOSFETs targeted to drive unidirectional brushed-DC motors or solenoid loads.

A PWM interface allows simple interfacing to controller circuits. An internal sense amplifier provides adjustable current control. Integrated Charge-Pump allows for 100% duty cycle support and can be used to drive external reverse battery switch. Independent Half Bridge mode allows sharing of half bridges to control multiple DC motors sequentially in a cost-efficient way. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping.

The DRV870xD-Q1 devices include Smart Gate Drive technology to remove the need for any external gate components (resistors and Zener diodes) while protecting the external FETs. The Smart Gate Drive architecture optimizes dead time to avoid any shoot-through conditions, provides flexibility in reducing electromagnetic interference (EMI) with programmable slew-rate control and protects against any gate-short conditions. Additionally, active and passive pulldowns are included to prevent any dv/dt gate turn on.

The DRV870xD-Q1 devices are small half bridge gate drivers that use two external N-channel MOSFETs targeted to drive unidirectional brushed-DC motors or solenoid loads.

A PWM interface allows simple interfacing to controller circuits. An internal sense amplifier provides adjustable current control. Integrated Charge-Pump allows for 100% duty cycle support and can be used to drive external reverse battery switch. Independent Half Bridge mode allows sharing of half bridges to control multiple DC motors sequentially in a cost-efficient way. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping.

The DRV870xD-Q1 devices include Smart Gate Drive technology to remove the need for any external gate components (resistors and Zener diodes) while protecting the external FETs. The Smart Gate Drive architecture optimizes dead time to avoid any shoot-through conditions, provides flexibility in reducing electromagnetic interference (EMI) with programmable slew-rate control and protects against any gate-short conditions. Additionally, active and passive pulldowns are included to prevent any dv/dt gate turn on.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet DRV870xD-Q1 Automotive Half-Bridge Gate Driver datasheet (Rev. B) PDF | HTML 20 Sep 2018
Application note Using DRV to Drive Solenoids (Rev. A) PDF | HTML 24 Apr 2022
Application note Best Practices for Board Layout of Motor Drivers (Rev. B) PDF | HTML 14 Okt 2021
Application note Understanding Smart Gate Drive (Rev. D) 01 Mär 2021
Application note Methods to Configure Current Regulation for Brushed and Stepper Motors (Rev. B) PDF | HTML 19 Jan 2021
Application note Detecting Short to Battery and Ground Conditions with TI Motor Gate Drivers PDF | HTML 29 Mai 2020
White paper Smart Gate Drive 02 Jul 2019
Application note Protecting Automotive Motor Drive Systems from Reverse Polarity Conditions (Rev. A) 19 Feb 2019
Application note Cut-Off Switch in High-Current Motor-Drive Applications (Rev. A) 20 Aug 2018
Technical article Why are you still driving automotive motors with relays? PDF | HTML 13 Jul 2017
EVM User's guide DRV8703D-Q1 EVM User’s Guide 22 Mär 2017
Application note Relay Replacement for Brushed DC Motor Drive in Automotive Applications 14 Nov 2016

Design und Entwicklung

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Evaluierungsplatine

DRV8703D-Q1EVM — DRV8703D-Q1 Evaluierungsmodul für bürstenbehaftete Haĺbbrücken-DC-Motortreiber mit SPI für die Autom

The DRV8703D-Q1EVM (evaluation module) serves as an evaluation kit to demonstrate TI's DRV8703D-Q1 Half-bridge gate driver. An MSP430G2553 is used to control the duty cycle and direction of the motor, while also monitoring the motor current reported from the DRV8703D-Q1. The power stage is created (...)
Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
VQFN (RHB) 32 Ultra Librarian

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