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SN54HC240

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8-Kanal-Wechselrichter, 2 bis 6 V mit Tri-State-Ausgängen für Militäranwendungen

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SN54HC240

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Produktdetails

Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 80 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 80 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 20 167.464 mm² 24.2 x 6.92 CFP (W) 20 90.5828 mm² 13.09 x 6.92 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Wide operating voltage range of 2V to 6V
  • High-current outputs drive up to 15 LSTTL loads
  • Low power consumption, 80µA max ICC
  • Typical tpd = 9ns
  • ±6mA output drive at 5V
  • Low input current of 1µA max
  • 3-state outputs drive bus lines or buffer memory address registers
  • Wide operating voltage range of 2V to 6V
  • High-current outputs drive up to 15 LSTTL loads
  • Low power consumption, 80µA max ICC
  • Typical tpd = 9ns
  • ±6mA output drive at 5V
  • Low input current of 1µA max
  • 3-state outputs drive bus lines or buffer memory address registers

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
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* Data sheet SNx4HC240 Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. H) PDF | HTML 22 Aug 2024

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