Gehäuseinformationen
| Gehäuse | Pins TSSOP (PW) | 8 |
| Betriebstemperaturbereich (°C) 0 to 70 |
| Gehäusemenge | Träger 150 | TUBE |
Merkmale von UCC3946
- Fully Programmable Reset Threshold
- Fully Programmable Reset Period
- Fully Programmable Watchdog Period
- 2% Accurate Reset Threshold
- Input Voltage Down to 2 V
- Input 18-µA Maximum Input Current
- Reset Valid Down to 1 V
Beschreibung von UCC3946
The UCCx946 is designed to provide accurate microprocessor supervision, including reset and watchdog functions. During power up, the device asserts a reset signal RES with VDD as low as 1 V. The reset signal remains asserted until the VDD voltage rises and remains above the reset threshold for the reset period. Both reset threshold and reset period are programmable by the user.
The UCCx946 is also resistant to glitches on the VDD line. Once RES has been deasserted, any drops below the threshold voltage need to be of certain time duration and voltage magnitude to generate a reset signal. These values are shown in Figure 1. An I/O line of the microprocessor may be tied to the watchdog input (WDI) for watchdog functions. If the I/O line is not toggled within a set watchdog period, programmable by the user, WDO is asserted. The watchdog function is disabled during reset conditions.
The UCCx946 is available in 8-pin SOIC(D), 8-pin PDIP (N) and 8-pin TSSOP(PW) packages to optimize board space.