Detalles del producto

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 8 Supply current (typ) (µA) 0.01 Bandwidth (MHz) 40 Operating temperature range (°C) -40 to 125 Input/output continuous current (max) (mA) 10 Rating Automotive Drain supply voltage (max) (V) 18 Supply voltage (max) (V) 18 Negative rail supply voltage (max) (V) 0
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 8 Supply current (typ) (µA) 0.01 Bandwidth (MHz) 40 Operating temperature range (°C) -40 to 125 Input/output continuous current (max) (mA) 10 Rating Automotive Drain supply voltage (max) (V) 18 Supply voltage (max) (V) 18 Negative rail supply voltage (max) (V) 0
SOIC (D) 14 51.9 mm² 8.65 x 6
  • Qualified for Automotive Applications
  • 15-V Digital or ±7.5-V Peak-to-Peak Switching
  • 125-Ω Typical On-State Resistance for 15-V Operation
  • Switch On-State Resistance Matched to Within 5 Ω Over 15-V Signal-Input Range
  • On-State Resistance Flat Over Full Peak-to-Peak Signal Range
  • High On/Off Output-Voltage Ratio: 80 dB Typical at fis = 10 kHz, RL = 1 kύ
  • High Degree of Linearity: <0.5% Distortion Typical at fis = 1 kHz, Vis = 5 V p-p,
    VDD – VSS ≥ 10 V, RL = 10 kΩ
  • Extremely Low Off-State Switch Leakage, Resulting in Very Low Offset Current
    and High Effective Off-State Resistance: 10 pA Typical at VDD – VSS = 10 V,
    TA = 25°C
  • Extremely High Control Input Impedance (Control Circuit Isolated From Signal Circuit):
    1012 Ω Typical
  • Low Crosstalk Between Switches: –50 dB Typical at fis = 8 MHz, RL = 1 kΩ
  • Matched Control-Input to Signal-Output Capacitance: Reduces Output Signal Transients
  • Frequency Response, Switch On = 40 MHz Typical
  • 100% Tested for Quiescent Current at 20 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Latch-Up Exceeds 100mA per JESD78 - Class I
  • Meets All Requirements of JEDEC Tentative Standard No. 13-B,
    Standard Specifications for Description of "B" Series CMOS Devices
  • APPLICATIONS
    • Analog Signal Switching/Multiplexing: Signal Gating, Modulator, Squelch Control,
      Demodulator, Chopper, Commutating Switch
    • Digital Signal Switching/Multiplexing
    • Transmission-Gate Logic Implementation
    • Analog-to-Digital and Digital-to-Analog Conversion
    • Digital Control of Frequency, Impedance, Phase, and Analog-Signal Gain

  • Qualified for Automotive Applications
  • 15-V Digital or ±7.5-V Peak-to-Peak Switching
  • 125-Ω Typical On-State Resistance for 15-V Operation
  • Switch On-State Resistance Matched to Within 5 Ω Over 15-V Signal-Input Range
  • On-State Resistance Flat Over Full Peak-to-Peak Signal Range
  • High On/Off Output-Voltage Ratio: 80 dB Typical at fis = 10 kHz, RL = 1 kύ
  • High Degree of Linearity: <0.5% Distortion Typical at fis = 1 kHz, Vis = 5 V p-p,
    VDD – VSS ≥ 10 V, RL = 10 kΩ
  • Extremely Low Off-State Switch Leakage, Resulting in Very Low Offset Current
    and High Effective Off-State Resistance: 10 pA Typical at VDD – VSS = 10 V,
    TA = 25°C
  • Extremely High Control Input Impedance (Control Circuit Isolated From Signal Circuit):
    1012 Ω Typical
  • Low Crosstalk Between Switches: –50 dB Typical at fis = 8 MHz, RL = 1 kΩ
  • Matched Control-Input to Signal-Output Capacitance: Reduces Output Signal Transients
  • Frequency Response, Switch On = 40 MHz Typical
  • 100% Tested for Quiescent Current at 20 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Latch-Up Exceeds 100mA per JESD78 - Class I
  • Meets All Requirements of JEDEC Tentative Standard No. 13-B,
    Standard Specifications for Description of "B" Series CMOS Devices
  • APPLICATIONS
    • Analog Signal Switching/Multiplexing: Signal Gating, Modulator, Squelch Control,
      Demodulator, Chopper, Commutating Switch
    • Digital Signal Switching/Multiplexing
    • Transmission-Gate Logic Implementation
    • Analog-to-Digital and Digital-to-Analog Conversion
    • Digital Control of Frequency, Impedance, Phase, and Analog-Signal Gain

The CD4066B-Q1 is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with the CD4016B, but exhibits a much lower on-state resistance. In addition, the on-state resistance is relatively constant over the full signal-input range.

The CD4066B-Q1 consists of four bilateral switches, each with independent controls. Both the p and the n devices in a given switch are biased on or off simultaneously by the control signal. As shown in , the well of the n-channel device on each switch is tied to either the input (when the switch is on) or to VSS (when the switch is off). This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and, thus, keeps the on-state resistance low over the full operating-signal range.

The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B is recommended.

The CD4066B-Q1 is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with the CD4016B, but exhibits a much lower on-state resistance. In addition, the on-state resistance is relatively constant over the full signal-input range.

The CD4066B-Q1 consists of four bilateral switches, each with independent controls. Both the p and the n devices in a given switch are biased on or off simultaneously by the control signal. As shown in , the well of the n-channel device on each switch is tied to either the input (when the switch is on) or to VSS (when the switch is off). This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and, thus, keeps the on-state resistance low over the full operating-signal range.

The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B is recommended.

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Documentación técnica

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Tipo Título Fecha
* Data sheet CMOS Quad Bilateral Switch, CD4066B-Q1 datasheet 01 abr 2011
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
More literature Automotive Logic Devices Brochure 27 ago 2014
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 dic 2001

Diseño y desarrollo

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Adaptador de interfaz

LEADED-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas rápidas de encapsulados con plomo

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Guía del usuario: PDF
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SOIC (D) 14 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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