Detalles del producto

Function Clock buffer Number of outputs 1 Output frequency (max) (MHz) 108 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS Output type LVCMOS Operating temperature range (°C) -40 to 105 Features 3.3-V VCC/VDD, Pin programmable Rating Automotive
Function Clock buffer Number of outputs 1 Output frequency (max) (MHz) 108 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS Output type LVCMOS Operating temperature range (°C) -40 to 105 Features 3.3-V VCC/VDD, Pin programmable Rating Automotive
TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Part of a Family of Easy-to-Use Clock Generator Devices
  • Clock Multiplier With Selectable Output Frequency
  • Frequency Multiplication Selectable Between x1 or x4 With One External Control Pin
  • Output Disable Through Control Pin
  • Single 3.3-V Device Power Supply
  • Wide Temperature Range: –40°C to 105°C
  • Low Space Consumption 8-Pin TSSOP Package
  • Create a Custom Design Using the CDCS504-Q1 With the WEBENCH® Power Designer
  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Part of a Family of Easy-to-Use Clock Generator Devices
  • Clock Multiplier With Selectable Output Frequency
  • Frequency Multiplication Selectable Between x1 or x4 With One External Control Pin
  • Output Disable Through Control Pin
  • Single 3.3-V Device Power Supply
  • Wide Temperature Range: –40°C to 105°C
  • Low Space Consumption 8-Pin TSSOP Package
  • Create a Custom Design Using the CDCS504-Q1 With the WEBENCH® Power Designer

The CDCS504-Q1 device is a LVCMOS input clock buffer with selectable frequency multiplication.

The CDCS504-Q1 has an output enable pin.

The device accepts a 3.3-V LVCMOS signal at the input.

The input signal is processed by a phased-locked loop (PLL), whose output frequency is either equal to the input frequency or multiplied by the factor of four.

By this, the device can generate output frequencies between 2 MHz and 108 MHz.

A separate control pin can be used to enable or disable the output. The CDCS504-Q1 device operates in a 3.3-V environment.

It is characterized for operation from –40°C to 105°C and is available in an 8-pin TSSOP package.

The CDCS504-Q1 device is a LVCMOS input clock buffer with selectable frequency multiplication.

The CDCS504-Q1 has an output enable pin.

The device accepts a 3.3-V LVCMOS signal at the input.

The input signal is processed by a phased-locked loop (PLL), whose output frequency is either equal to the input frequency or multiplied by the factor of four.

By this, the device can generate output frequencies between 2 MHz and 108 MHz.

A separate control pin can be used to enable or disable the output. The CDCS504-Q1 device operates in a 3.3-V environment.

It is characterized for operation from –40°C to 105°C and is available in an 8-pin TSSOP package.

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Documentación técnica

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* Data sheet CDCS504-Q1 Clock Buffer and Clock Multiplier datasheet PDF | HTML 27 abr 2017

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

CDCS504 IBIS Model

SCAM064.ZIP (24 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Diseños de referencia

TIDA-00743 — Diseño de referencia del amplificador de audio de 2 MHz de clase D, 4 canales y 21 W de calidad auto

The TIDA-00743 reference design is a small module designed for evaluation of a digital-input class-D audio amplifier in a system which has been designed for a typical class AB audio power amplifier module. This design demonstrates the reduction in power dissipation that a class D amplifier (...)
Design guide: PDF
Esquema: PDF
Paquete Pasadores Descargar
TSSOP (PW) 8 Ver opciones

Pedidos y calidad

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  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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