TPS3813-Q1

The TPS3813-Q1 supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems.

During power on, the RESET pin is asserted when the supply voltage (V_DD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors V_DD and keeps the RESET pin active as long as V_DD remains below the threshold voltage (V_IT).

An internal timer delays the return of the output to the inactive (high) state to ensure proper system reset. The delay time, t_d = 25 ms typical, begins after V_DD has risen above the threshold voltage (V_IT). When the supply voltage drops below the threshold voltage (V_IT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (V_IT) set by an internal voltage divider.

For safety-critical applications, the TPS3813-Q1 family of device s incorporate a window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting the WDT pin to GND or V_DD, or by using an external capacitor. The lower limit, and thus the window ratio, is set by connecting the WDR pin to GND or V_DD. The RESET pin will assert a reset to the microcontroller if the watchdog is incorrectly serviced.

The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The device s are available in a 6-pin SOT-23 package. The device s are characterized for operation over a temperature range of –40°C to 125°C.