TLC1543-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –40°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product Change Notification
- Qualification Pedigree
- 10-Bit Resolution A/D Converter
- 11 Analog Input Channels
- Three Built-In Self-Test Modes
- Inherent Sample-and-Hold Function
- Total Unadjusted Error . . . ±1 LSB Max
- On-Chip System Clock
- End-of-Conversion (EOC) Output
- Terminal Compatible With TLC542
- CMOS Technology
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
The TLC1542-EP and TLC1543-EP are CMOS 10-bit switched-capacitor successive-approximation analog-to-digital converters. These devices have three inputs, a 3-state output chip select (CS)\, input/output clock (I/O CLOCK), address input (ADDRESS), and data output (DATA OUT)] that provide a direct 4-wire interface to the serial port of a host processor. The TLC1542-EP and TLC1543-EP allow high-speed data transfers from the host.
In addition to a high-speed A/D converter and versatile control capability, the TLC1542-EP and TLC1543-EP have an on-chip 14-channel multiplexer that can select any one of 11 analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that conversion is complete. The converter incorporated in the TLC1542-EP and TLC1543-EP feature differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating free-air temperature range.
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技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | 10-Bit Analog-to-Digital Converters w/Serial Control & 11 Analog Inputs データシート (Rev. A) | 2006/02/21 | |||
| * | VID | TLC1543-EP VID V6204647 | 2016/06/21 | |||
| e-Book（PDF） | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/05/21 | ||||
| アプリケーション・ノート | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011/03/17 |
設計と開発
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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| SOIC (DW) | 20 | Ultra Librarian |