홈 로직 및 전압 변환 Configurable & programmable logic ICs Multivibrator one-shots
홈
로직 및 전압 변환
Configurable & programmable logic ICs
Multivibrator one-shots

CD4047B

활성

CMOS 저전력 단안정 멀티바이브레이터/비안정 멀티바이브레이터

지금 주문
데이터시트

CD4047B

활성
데이터시트 지금 주문

제품 상세 정보

Number of channels 1 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (µA) 600 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 1 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (µA) 600 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4
  • Lower power consumption: special CMOS oscillator configuration
  • Monostable (one-shot) or astable (free-running) operation
  • True and complemented buffered outputs
  • Only one external R anc C required
  • Buffered inputs
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Monostable Multivibrator Features:
    • Positive-or negative-edge trigger
    • Output pulse width independent of trigger pulse duration
    • Retriggerable option for pulse width expansion
    • Internal power-on reset circuit
    • Long pulse widths possible using small RC components by means of external counter provision
    • Fast recovery time essentially independent of pulse width
    • Pulse-width accuracy maintained at duty cycles approaching 100%
  • Astable Multivibrator Features:
    • Free-running or gatable operating modes
    • 50% duty cycle
    • Oscillator output available
    • Good astable frequency stability:
         Frequency deviation:
           = ±2% + 0.03%/°C @ 100 kHz
           = ±0.5% +0.015%/°C @ 10 kHz (circuits "trimmed" to frequency VDD = 10 V ± 10%)
  • Applications:
    Digital equipment where low-power dissipation and/or high noise immunity are primary design requirements:
    • Envelope detection
    • Frequency multiplication
    • Frequency division
    • Frequency discriminators
    • Timing circuits
    • Time-delay applications

Data sheet acquired from Harris Semiconductor
  • Lower power consumption: special CMOS oscillator configuration
  • Monostable (one-shot) or astable (free-running) operation
  • True and complemented buffered outputs
  • Only one external R anc C required
  • Buffered inputs
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Monostable Multivibrator Features:
    • Positive-or negative-edge trigger
    • Output pulse width independent of trigger pulse duration
    • Retriggerable option for pulse width expansion
    • Internal power-on reset circuit
    • Long pulse widths possible using small RC components by means of external counter provision
    • Fast recovery time essentially independent of pulse width
    • Pulse-width accuracy maintained at duty cycles approaching 100%
  • Astable Multivibrator Features:
    • Free-running or gatable operating modes
    • 50% duty cycle
    • Oscillator output available
    • Good astable frequency stability:
         Frequency deviation:
           = ±2% + 0.03%/°C @ 100 kHz
           = ±0.5% +0.015%/°C @ 10 kHz (circuits "trimmed" to frequency VDD = 10 V ± 10%)
  • Applications:
    Digital equipment where low-power dissipation and/or high noise immunity are primary design requirements:
    • Envelope detection
    • Frequency multiplication
    • Frequency division
    • Frequency discriminators
    • Timing circuits
    • Time-delay applications

Data sheet acquired from Harris Semiconductor

CD4047B consists of a gatable astable multivibrator with logic techniques incorporated to permit positive or negative edge-triggered monostable multivibrator action with retriggering and external counting options.

Inputs include +TRIGGER, -TRIGGER, ASTABLE, ASTABLE\, RETRIGGER, and EXTERNAL RESET. Buffered outputs are Q\, Q and OSCILLATOR. In all modes of operation, and external capacitor must be connected between C-Timing and RC-Common terminal, and an external resistor must be connected between the R-Timing and RC-Common terminals.

Astable operation is enabled by a high level on the STABLE input or a low level on the ASTABLE\ input, or both. The period of the square wave at the Q and Q\ Outputs in this mode off operation is a function of the external components employed. "True" input pulses on the ASTABLE input or "Complement" pulses on the ASTABLE\ input allow the circuit to be used as a gatable multivibrator. The OSCILLATOR output period will be half of the Q terminal output in the astable mode. However, a 50% duty cycle is not guaranteed at this output.

The CD4047B triggers in the monostable mode when a positive-going edge occurs on the +TRIGGER-input while the -TRIGGER is held low. INput pulses may be of any duration relative to the output pulse.

If retrigger capability is desired, the RETRIGGER input is pulsed. The retriggerable mode of operation is limited to positive-going edge. The CD4047B will retrigger as long as the RETRIGGER-input is high, with or without transitions (See Fig. 34).

An external countdown option can be implemented by coupling "Q" to an external "N" counter and resetting the counter with the trigger pulse. The counter output pulse is fed back to the ASTABLE\ input and has a duration equal to N times the period of the multivibrator.

A high level on the EXTERNAL RESET input assures no output pulse during an "ON" power condition. This input can also be activated to terminate the output pulse at any tine. For monostable operation, whenever VDD is applied, and internal power-on reset circuit will clock the Q output low within one output period (tM).

The CD4047B-Series types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4047B consists of a gatable astable multivibrator with logic techniques incorporated to permit positive or negative edge-triggered monostable multivibrator action with retriggering and external counting options.

Inputs include +TRIGGER, -TRIGGER, ASTABLE, ASTABLE\, RETRIGGER, and EXTERNAL RESET. Buffered outputs are Q\, Q and OSCILLATOR. In all modes of operation, and external capacitor must be connected between C-Timing and RC-Common terminal, and an external resistor must be connected between the R-Timing and RC-Common terminals.

Astable operation is enabled by a high level on the STABLE input or a low level on the ASTABLE\ input, or both. The period of the square wave at the Q and Q\ Outputs in this mode off operation is a function of the external components employed. "True" input pulses on the ASTABLE input or "Complement" pulses on the ASTABLE\ input allow the circuit to be used as a gatable multivibrator. The OSCILLATOR output period will be half of the Q terminal output in the astable mode. However, a 50% duty cycle is not guaranteed at this output.

The CD4047B triggers in the monostable mode when a positive-going edge occurs on the +TRIGGER-input while the -TRIGGER is held low. INput pulses may be of any duration relative to the output pulse.

If retrigger capability is desired, the RETRIGGER input is pulsed. The retriggerable mode of operation is limited to positive-going edge. The CD4047B will retrigger as long as the RETRIGGER-input is high, with or without transitions (See Fig. 34).

An external countdown option can be implemented by coupling "Q" to an external "N" counter and resetting the counter with the trigger pulse. The counter output pulse is fed back to the ASTABLE\ input and has a duration equal to N times the period of the multivibrator.

A high level on the EXTERNAL RESET input assures no output pulse during an "ON" power condition. This input can also be activated to terminate the output pulse at any tine. For monostable operation, whenever VDD is applied, and internal power-on reset circuit will clock the Q output low within one output period (tM).

The CD4047B-Series types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
SN74LVC1G123 활성 슈미트 트리거 입력을 지원하는 단일 재트리거 가능 단안정 멀티바이브레이터 Smaller voltage range (1.65V to 5.5V), shorter average propagation delay (5.5ns), higher average drive strength (24mA)

기술 문서

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모두 보기8
유형 직함 날짜
* Data sheet CD4047B TYPES datasheet (Rev. C) 2003/08/21
Application note Designing With the SN74LVC1G123 Monostable Multivibrator (Rev. A) PDF | HTML 2020/03/13
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 2001/12/03

설계 및 개발

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평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
TI.com에서 구매할 수 없습니다
패키지 핀 다운로드
PDIP (N) 14 옵션 보기
SOIC (D) 14 옵션 보기
SOP (NS) 14 옵션 보기
TSSOP (PW) 14 옵션 보기
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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