JFE2325
- Monolithic, matched, N-Channel JFETs
- Self-biased gates for high input impedance (>400GOhm)
- Low input capacitance: 0.85pF per JFET
- Low noise: ˗110dBV(A-wt.) with 5pF input capacitance
- Low VGS mismatch: 30mV (max)
- Low IDSS mismatch: 5% (max)
- High gate-to-drain breakdown voltage: 30V
- Extremely Small Package: 0.8mm × 1mm X2SON
The JFE2325 is a monolithic, matched-pair discrete JFET intended for use with very high-impedance sensors such as electret condenser microphones (ECMs). The device consists of two N-channel JFETs, laid out for excellent matching on a single die. The gate of each JFET is biased by an integrated diode which allows for direct coupling of a signal source to the gate without the need for a biasing resistor. The JFE2325 achieves much higher input impedance (>400GOhm) than possible if discrete resistors were used to bias the gate. Furthermore, the JFE2325 features an extremely low input capacitance of 0.85pF per JFET which maximizes signal levels from transducers with extremely low output capacitance.
Each JFET is capable of 0.7mS of transconductance when configured to run at the full drain current of 385µA. The JFETs can be used individually, or in parallel for higher transconductance and lower noise.
The JFE2325 can withstand a high gate-to-drain voltage of 30V. The temperature range is specified from –40°C to +125°C.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 날짜 |
|---|---|---|---|---|
| * | Data sheet | JFE2325 Dual, Low-Power, N-Channel JFET for Electret Microphones datasheet (Rev. A) | PDF | HTML | 2026/06/18 |
| EVM User's guide | JFE2325 Evaluation Module User's Guide | PDF | HTML | 2025/12/09 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
JFE2325EVM — JFE2325 평가 모듈
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| X2SON (DTQ) | 6 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치