홈 인터페이스 RS-485 및 RS-422 트랜시버
홈
인터페이스
RS-485 및 RS-422 트랜시버

SN65LBC176A-EP

활성

향상된 제품 차동 버스 트랜시버

지금 주문
데이터 시트

SN65LBC176A-EP

활성
데이터 시트 지금 주문

제품 상세 정보

Number of receivers 1 Number of transmitters 1 Duplex Half Supply voltage (nom) (V) 5 Signaling rate (max) (Mbps) 30 Fault protection (V) -10 to 15 Common-mode range (V) -7 to 12 Number of nodes 32 Isolated No Supply current (max) (µA) 15000 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Number of receivers 1 Number of transmitters 1 Duplex Half Supply voltage (nom) (V) 5 Signaling rate (max) (Mbps) 30 Fault protection (V) -10 to 15 Common-mode range (V) -7 to 12 Number of nodes 32 Isolated No Supply current (max) (µA) 15000 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • High-Speed Low-Power LinBiCMOS™ Circuitry Designed for Signaling Rates Up to 30 Mbps
  • Bus-Pin ESD Protection Exceeds 12-kV HBM
  • Compatible With ANSI Standard TIA/EIA-485-A and ISO 8482:1987(E)
  • Low Skew
  • Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments
  • Low Disabled Supply Current Requirements . . . 700 µA Maximum
  • Common Mode Voltage Range of –7 V to 12 V
  • Thermal-Shutdown Protection
  • Driver Positive and Negative Current Limiting
  • Open-Circuit Fail-Safe Receiver Design
  • Receiver Input Sensitivity ...±200 mV Max
  • Receiver Input Hysteresis . . . 50 mV Typ
  • Glitch-Free Power-Up and Power-Down Protection

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
Signaling rate by TIA/EIA-485-A definition restrict transition times to 30% of the bit length, and much higher signaling rates may be achieved without this requirement as displayed in the TYPICAL CHARACTERISTICS of this device.
LinBiCMOS and LinASIC are trademarks of Texas Instruments.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • High-Speed Low-Power LinBiCMOS™ Circuitry Designed for Signaling Rates Up to 30 Mbps
  • Bus-Pin ESD Protection Exceeds 12-kV HBM
  • Compatible With ANSI Standard TIA/EIA-485-A and ISO 8482:1987(E)
  • Low Skew
  • Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments
  • Low Disabled Supply Current Requirements . . . 700 µA Maximum
  • Common Mode Voltage Range of –7 V to 12 V
  • Thermal-Shutdown Protection
  • Driver Positive and Negative Current Limiting
  • Open-Circuit Fail-Safe Receiver Design
  • Receiver Input Sensitivity ...±200 mV Max
  • Receiver Input Hysteresis . . . 50 mV Typ
  • Glitch-Free Power-Up and Power-Down Protection

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
Signaling rate by TIA/EIA-485-A definition restrict transition times to 30% of the bit length, and much higher signaling rates may be achieved without this requirement as displayed in the TYPICAL CHARACTERISTICS of this device.
LinBiCMOS and LinASIC are trademarks of Texas Instruments.

The SN65LBC176A-EP differential bus transceiver is a monolithic, integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. The SN65LBC176A-EP is designed for balanced transmission lines and is compatible with ANSI standard TIA/EIA-485-A and ISO 8482. The SN65LBC176A-EP offers improved switching performance over its predecessors without sacrificing significantly more power.

The SN65LBC176A-EP combines a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can externally connect together to function as a direction control. The driver differential outputs and the receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. Low device supply current can be achieved by disabling the driver and the receiver.

The SN65LBC176A-EP differential bus transceiver is a monolithic, integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. The SN65LBC176A-EP is designed for balanced transmission lines and is compatible with ANSI standard TIA/EIA-485-A and ISO 8482. The SN65LBC176A-EP offers improved switching performance over its predecessors without sacrificing significantly more power.

The SN65LBC176A-EP combines a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can externally connect together to function as a direction control. The driver differential outputs and the receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. Low device supply current can be achieved by disabling the driver and the receiver.
filter 기타 RS-485 및 RS-422 트랜시버 찾기
다운로드

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
SN65LBC176 활성 차동 버스 트랜시버 Catalog version
THVD2450V-EP 활성 유연한 IO 및 70V 버스 고장 방지 기능을 갖춘 향상된 제품 3V~5.5V, 50Mbps 하프 듀플렉스 RS-485 트랜시버 Added Vio and Selectable datarates

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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2개 모두 보기
유형 직함 날짜
* Radiation & reliability report SN65LBC176AQDREP Reliability Report 2013/01/07
* Data sheet SN65LBC176A-EP: Differential Bus Transceivers datasheet (Rev. C) 2004/07/06

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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포럼 주제 모두 보기(영문)

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