SN65LV1224B

활성

1:10 LVDS 시리얼라이저/디시리얼라이저 리시버 100~660Mbps

제품 상세 정보

Function Deserializer Protocols Channel-Link I Signaling rate (Mbps) 660 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Deserializer Protocols Channel-Link I Signaling rate (Mbps) 660 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
VQFN (RHB) 32 25 mm² (5 mm × 5 mm) SSOP (DB) 28 79.56 mm² (10.2 mm × 7.8 mm)
  • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz
    to 66-MHz System Clock
  • Pin-Compatible Superset of DS92LV1023/DS92LV1224
  • Chipset (Serializer/Deserializer) Power Consumption <450 mW (Typ) at 66 MHz
  • Synchronization Mode for Faster Lock
  • Lock Indicator
  • No External Components Required for PLL
  • 28-Pin SSOP and Space Saving 5 × 5 mm QFN Packages Available
  • Industrial Temperature Qualified,
    TA = −40°C to 85°C
  • Programmable Edge Trigger on Clock
  • Flow-Through Pinout for Easy PCB Layout
  • APPLICATIONS
    • Wireless Base Station
    • Backplane Interconnect
    • DSLAM

  • 100-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz
    to 66-MHz System Clock
  • Pin-Compatible Superset of DS92LV1023/DS92LV1224
  • Chipset (Serializer/Deserializer) Power Consumption <450 mW (Typ) at 66 MHz
  • Synchronization Mode for Faster Lock
  • Lock Indicator
  • No External Components Required for PLL
  • 28-Pin SSOP and Space Saving 5 × 5 mm QFN Packages Available
  • Industrial Temperature Qualified,
    TA = −40°C to 85°C
  • Programmable Edge Trigger on Clock
  • Flow-Through Pinout for Easy PCB Layout
  • APPLICATIONS
    • Wireless Base Station
    • Backplane Interconnect
    • DSLAM

The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload encoded throughput.

Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode, the deserializer establishes lock within specified, shorter time parameters.

The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is available to place the output pins in the high-impedance state without losing PLL lock.

The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –40°C to 85°C.

The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload encoded throughput.

Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode, the deserializer establishes lock within specified, shorter time parameters.

The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is available to place the output pins in the high-impedance state without losing PLL lock.

The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –40°C to 85°C.

다운로드 스크립트와 함께 비디오 보기 비디오

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능.
SN65LVDS302 활성 프로그래머블 27비트 디스플레이 직렬 인터페이스 리시버 Lower supply voltage (1.8V), higher signaling rate (1755Mbps), LVDS Input

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
4개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 10-MHz to 66-MHz, 10:1-LVDS Serializer/Deserializer datasheet (Rev. E) 2009. 12. 7
애플리케이션 노트 Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 2020. 10. 29
Application brief Migrating from DS92LV1021A/1212A 10-bit SerDes to SN65LV1023A/1224B 2018. 11. 15
사용 설명서 10:1 Serializer/Deserializer Evaluation Board 2013. 11. 20

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 CAD 기호, 풋프린트 및 3D 모델
VQFN (RHB) 32 Ultra Librarian
SSOP (DB) 28 Ultra Librarian

주문 및 품질

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상