SN74LV86A

활성

4채널 2입력 2V~5.5V XOR(배타적 OR) 게이트

지금 주문하기

데이터 시트

document-pdfAcrobat SNx4LV86A Quadruple 2-Input Exclusive-OR Gates datasheet (Rev. G) (영어) PDF | HTML

SN74LV86A

활성

데이터 시트

지금 주문하기

제품 상세 정보

Technology family

LV-A

Number of channels

4

Inputs per channel

2

IOL (max) (mA)

12

Input type

Standard CMOS

IOH (max) (mA)

-12

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Data rate (max) (Mbps)

70

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LV-A

Number of channels

4

Inputs per channel

2

IOL (max) (mA)

12

Input type

Standard CMOS

IOH (max) (mA)

-12

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Data rate (max) (Mbps)

70

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOP (NS)

14

79.56 mm² (10.2 mm × 7.8 mm)

TSSOP (PW)

14

32 mm² (5 mm × 6.4 mm)

SOIC (D)

14

51.9 mm² (8.65 mm × 6 mm)

TVSOP (DGV)

14

23.04 mm² (3.6 mm × 6.4 mm)

SSOP (DB)

14

48.36 mm² (6.2 mm × 7.8 mm)

2-V to 5.5-V V_CC Operation
Max t_pd of 8 ns at 5 V
Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2.3 V
at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All Ports
Latch-Up Performance Exceeds 250 mA per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

2-V to 5.5-V V_CC Operation
Max t_pd of 8 ns at 5 V
Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2.3 V
at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Voltage Operation on All Ports
Latch-Up Performance Exceeds 250 mA per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

The ’LV86A devices are quadruple 2-input exclusive-OR gates designed for 2-V to 5.5-V V_CC operation.

These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

The ’LV86A devices are quadruple 2-input exclusive-OR gates designed for 2-V to 5.5-V V_CC operation.

These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

filter

기타 XOR(배타적 OR) 게이트 찾기

다운로드 스크립트와 함께 비디오 보기 비디오