홈 마이크로컨트롤러(MCU) 및 프로세서 마이크로프로세서 및 DSP 차량용 운전자 지원 SoC
홈
마이크로컨트롤러(MCU) 및 프로세서
마이크로프로세서 및 DSP
차량용 운전자 지원 SoC

TDA2P-ABZ

활성

ADAS를 위한 그래픽, 이미징, 비디오, 비전 가속화 옵션을 갖춘 TDA2 핀 호환 SoC 제품군

지금 주문하기
데이터 시트
사용자 가이드

TDA2P-ABZ

활성
데이터 시트 지금 주문하기

제품 상세 정보

CPU 2 Arm Cortex-A15 Frequency (MHz) 500, 650, 750, 1176 Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Embedded vision engines, Image system processor, Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 2 Arm Cortex-A15 Frequency (MHz) 500, 650, 750, 1176 Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Embedded vision engines, Image system processor, Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCCSP (ABZ) 760 529 mm² (23 mm × 23 mm)
  • Architecture Designed for ADAS Applications
  • Video, Image, and Graphics Processing Support
    • Full-HD Video (1920 × 1080p, 60 fps)
    • Multiple Video Input and Video Output
  • Dual Arm® Cortex®-A15 Microprocessor Subsystem
  • Up to Two C66x Floating-Point VLIW DSP
    • Fully Object-Code Compatible with C67x and C64x+
    • Up to Thirty-Two 16 × 16-Bit Fixed-Point Multiplies per Cycle
  • Up to 2.5MB of On-Chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) Interconnects
  • Two DDR2/DDR3/DDR3L Memory Interface (EMIF) Modules
    • Supports up to DDR2-800 and DDR3-1333
    • Up to 2GB Supported per EMIF
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • Vision AccelerationPac
    • Up to Two Embedded Vision Engines (EVEs)
  • Imaging Subsystem (ISS)
    • Image Signal Processor (ISP)
    • Wide Dynamic Range and Lens Distortion Correction (WDR and Mesh LDC)
    • One Camera Adaptation Layer (CAL_B)
  • IVA-HD Subsystem
  • Display Subsystem
    • Display Controller with DMA Engine and up to Three Pipelines
    • HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant
  • 2D-Graphics Accelerator (BB2D) Subsystem
    • Vivante® GC320 Core
  • Video Processing Engine (VPE)
  • Dual-Core PowerVR® SGX544 3D GPU
  • Two Video Input Port (VIP) Modules
    • Support for up to Eight Multiplexed Input Ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) Controller
  • 2-Port Gigabit Ethernet (GMAC)
  • Up to Two Controller Area Network (DCAN) Modules
    • CAN 2.0B Protocol
  • Modular Controller Area Network (MCAN) Module
    • CAN 2.0B Protocol with Available FD (Flexible Data Rate) Functionality
  • PCI Express® 3.0 Port with Integrated PHY
    • One 2-Lane Gen2-Compliant Port
    • or Two 1-Lane Gen2-Compliant Ports
  • Sixteen 32-Bit General-Purpose Timers
  • 32-Bit MPU Watchdog Timer
  • Ten Configurable UART/IrDA/CIR Modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface
  • Five Inter-Integrated Circuit (I2C) Ports
  • SATA Interface
  • Eight Multichannel Audio Serial Port (McASP) Modules
  • SuperSpeed USB 3.0 Dual-Role Device
  • Three High-Speed USB 2.0 Dual-Role Devices
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) Pins
  • Real-Time Clock Subsystem (RTCSS)
  • Device Security Features
    • Hardware Crypto Accelerators and DMA
    • Firewalls
    • JTAG® Lock
    • Secure Keys
    • Secure ROM and Boot
    • Customer Programmable Keys and OTP Data
  • Power, Reset, and Clock Management
  • On-Chip Debug With CTools Technology
  • Automotive AEC-Q100 Qualified
  • 28-nm CMOS Technology
  • 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABZ)
  • Architecture Designed for ADAS Applications
  • Video, Image, and Graphics Processing Support
    • Full-HD Video (1920 × 1080p, 60 fps)
    • Multiple Video Input and Video Output
  • Dual Arm® Cortex®-A15 Microprocessor Subsystem
  • Up to Two C66x Floating-Point VLIW DSP
    • Fully Object-Code Compatible with C67x and C64x+
    • Up to Thirty-Two 16 × 16-Bit Fixed-Point Multiplies per Cycle
  • Up to 2.5MB of On-Chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) Interconnects
  • Two DDR2/DDR3/DDR3L Memory Interface (EMIF) Modules
    • Supports up to DDR2-800 and DDR3-1333
    • Up to 2GB Supported per EMIF
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • Vision AccelerationPac
    • Up to Two Embedded Vision Engines (EVEs)
  • Imaging Subsystem (ISS)
    • Image Signal Processor (ISP)
    • Wide Dynamic Range and Lens Distortion Correction (WDR and Mesh LDC)
    • One Camera Adaptation Layer (CAL_B)
  • IVA-HD Subsystem
  • Display Subsystem
    • Display Controller with DMA Engine and up to Three Pipelines
    • HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant
  • 2D-Graphics Accelerator (BB2D) Subsystem
    • Vivante® GC320 Core
  • Video Processing Engine (VPE)
  • Dual-Core PowerVR® SGX544 3D GPU
  • Two Video Input Port (VIP) Modules
    • Support for up to Eight Multiplexed Input Ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) Controller
  • 2-Port Gigabit Ethernet (GMAC)
  • Up to Two Controller Area Network (DCAN) Modules
    • CAN 2.0B Protocol
  • Modular Controller Area Network (MCAN) Module
    • CAN 2.0B Protocol with Available FD (Flexible Data Rate) Functionality
  • PCI Express® 3.0 Port with Integrated PHY
    • One 2-Lane Gen2-Compliant Port
    • or Two 1-Lane Gen2-Compliant Ports
  • Sixteen 32-Bit General-Purpose Timers
  • 32-Bit MPU Watchdog Timer
  • Ten Configurable UART/IrDA/CIR Modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface
  • Five Inter-Integrated Circuit (I2C) Ports
  • SATA Interface
  • Eight Multichannel Audio Serial Port (McASP) Modules
  • SuperSpeed USB 3.0 Dual-Role Device
  • Three High-Speed USB 2.0 Dual-Role Devices
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) Pins
  • Real-Time Clock Subsystem (RTCSS)
  • Device Security Features
    • Hardware Crypto Accelerators and DMA
    • Firewalls
    • JTAG® Lock
    • Secure Keys
    • Secure ROM and Boot
    • Customer Programmable Keys and OTP Data
  • Power, Reset, and Clock Management
  • On-Chip Debug With CTools Technology
  • Automotive AEC-Q100 Qualified
  • 28-nm CMOS Technology
  • 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABZ)

TI’s new TDA2Px System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Px family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Px SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2Px SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2Px SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Px ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Px System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Px family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Px SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2Px SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2Px SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Px ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Px System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Px family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Px SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2Px SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2Px SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Px ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Px System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Px family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Px SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2Px SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2Px SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Px ADAS processor is qualified according to the AEC-Q100 standard.
filter 기타 차량용 운전자 지원 SoC 찾기
다운로드 스크립트와 함께 비디오 보기 비디오

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능.
TDA2P-ACD 활성 ADAS를 위한 그래픽, 이미징, 비디오 및 비전 가속화 옵션을 갖춘 고성능 SoC 제품군 Similar performance in a different package

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
38개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 TDA2Px ADAS Applications Processor 23mm Package (ABZ Package) Silicon Revision 1.0 datasheet (Rev. F) PDF | HTML 2018. 12. 10
* 사용 설명서 TDA2Px Technical Reference Manual (Rev. C) 2020. 2. 25
* 정오표 TDA2P, DRA7xxP, AM574x Package Discontinued and Redesigned (Rev. B) PDF | HTML 2026. 5. 26
* 정오표 TDA2Px Silicon Errata (Rev. B) PDF | HTML 2024. 9. 8
애플리케이션 노트 Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 2021. 5. 5
애플리케이션 노트 IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 2020. 8. 24
백서 Stereo vision- facing the challenges and seeing the opportunities for ADAS (Rev. A) 2020. 7. 24
백서 Paving the way to self-driving cars with ADAS (Rev. A) 2020. 7. 24
애플리케이션 노트 AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 2020. 1. 6
애플리케이션 노트 Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 2019. 6. 11
애플리케이션 노트 TDA2x/TDA2E Performance (Rev. A) PDF | HTML 2019. 6. 10
애플리케이션 노트 TDA2Px Performance (Rev. A) 2018. 10. 22
애플리케이션 노트 The Implementation of YUV422 Output for SRV 2018. 8. 2
애플리케이션 노트 MMC DLL Tuning (Rev. B) 2018. 7. 31
애플리케이션 노트 Integrating AUTOSAR on TI SoC: Fundamentals 2018. 6. 18
애플리케이션 노트 ECC/EDC on TDAxx (Rev. B) 2018. 6. 13
사용 설명서 TPS659039-Q1 User’s Guide to Power DRA74x, DRA75x, TDA2x, and AM572x (Rev. C) 2018. 5. 7
애플리케이션 노트 Sharing VPE Between VISIONSDK and PSDKLA 2018. 5. 4
사용 설명서 LP87565C-Q1 and TPS65917-Q1 User’s Guide to Power DRA7xxP and TDA2Pxx (Rev. A) 2018. 4. 20
애플리케이션 노트 TMS320C66x XMC Memory Protection 2018. 1. 31
애플리케이션 노트 DSS Bit Exact Output (Rev. A) 2018. 1. 12
애플리케이션 노트 Flashing Utility - mflash 2018. 1. 9
애플리케이션 노트 Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 2017. 11. 7
애플리케이션 노트 A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 2017. 11. 3
애플리케이션 노트 DSS BT656 Workaround for TDA2x (Rev. A) 2017. 11. 3
기능 안전 정보 Safety Features on VisionSDK 2017. 10. 26
애플리케이션 노트 Optimization of GPU-Based Surround View on TI’s TDA2x SoC 2017. 9. 12
백서 Step into next-gen architectures for multi-camera operations in automobiles 2017. 6. 16
백서 Making Cars Safer Through Technology Innovation (Rev. A) 2017. 6. 7
애플리케이션 노트 Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 2016. 12. 15
애플리케이션 노트 Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A) 2016. 8. 23
애플리케이션 노트 ADAS Power Management 2016. 3. 7
백서 Multicore SoCs stay a step ahead of SoC FPGAs 2016. 2. 23
백서 Surround view camera systems for ADAS (Rev. A) 2015. 10. 20
애플리케이션 노트 Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 2014. 8. 13
백서 TI Vision SDK, Optimized Vision Libraries for ADAS Systems 2014. 4. 14
백서 TI Gives Sight to Vision-Enabled Automotive Technologies 2013. 10. 16
백서 Empowering Automotive Vision with TI’s Vision AccelerationPac 2013. 10. 13

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TDA2PXEVM — TDA2Px 평가 모듈

TDA2Px EVM은 ADAS 애플리케이션의 개발 속도를 높이고 출시 기간을 단축하기 위해 설계된 평가 플랫폼입니다. TDA2Px EVM은 TI의 고정 및 부동 소수점 TMS320C66x 디지털 신호 프로세서(DSP) 코어, 비전 가속화 팩(EVE) 코어, Arm® Cortex®-A15 MP 코어, 3D GPU 코어, H.264 인코딩/디코딩 가속화 및 이중 Cortex-M4 코어가 혼합된 이기종 확장 가능 아키텍처를 통합한 TDA2Px 시스템 온 칩(SoC)을 기반으로 합니다. 또한 LVDS 기반 서라운드 뷰 시스템을 위한 멀티 (...)
사용 설명서: PDF
발송: SVTRONICS INC
지원되는 제품 및 하드웨어
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-RADAR — RTOS Processor SDK for Radar

Processor SDK-Vision(Vision SDK) 및 Processor SDK-Radar(Radar SDK)는 TDAx 프로세서용 멀티 프로세서 소프트웨어 개발 키트입니다. 소프트웨어 프레임워크는 사용자가 레이더 및 비디오 캡처, 레이더 처리, 비디오 캡처, 비디오 전처리, 비디오 분석 알고리즘 및 비디오 디스플레이와 관련된 여러 ADAS 애플리케이션 데이터 흐름을 만들도록 지원합니다. . 또한 이 릴리스에는 프로세서 SDK Linux가 통합되어 Linux 및 GPU가 필요한 차량용 ADAS 기능과 데모를 지원합니다. (...)

지원되는 제품 및 하드웨어
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-VISION — Linux and RTOS Processor SDK for Vision

Processor SDK-Vision(Vision SDK) 및 Processor SDK-Radar(Radar SDK)는 TDAx 프로세서용 멀티 프로세서 소프트웨어 개발 키트입니다. 소프트웨어 프레임워크는 사용자가 레이더 및 비디오 캡처, 레이더 처리, 비디오 캡처, 비디오 전처리, 비디오 분석 알고리즘 및 비디오 디스플레이와 관련된 여러 ADAS 애플리케이션 데이터 흐름을 만들도록 지원합니다. . 또한 이 릴리스에는 프로세서 SDK Linux가 통합되어 Linux 및 GPU가 필요한 차량용 ADAS 기능과 데모를 지원합니다. (...)

지원되는 제품 및 하드웨어
IDE, 구성, 컴파일러 또는 디버거

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

지원되는 제품 및 하드웨어
IDE, 구성, 컴파일러 또는 디버거

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

지원되는 제품 및 하드웨어
운영 체제(OS)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
지원되는 제품 및 하드웨어
시뮬레이션 모델

DRA7xxP and TDA2Px BSDL Files

SPRM750.ZIP (34 KB) - BSDL 모델
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시뮬레이션 모델

DRA7xxP and TDA2Px IBIS Files

SPRM748.ZIP (36622 KB) - IBIS 모델
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시뮬레이션 모델

DRA7xxP and TDA2Px Thermal Model

SPRM749.ZIP (2 KB) - 열 모델
지원되는 제품 및 하드웨어
계산 툴

CLOCKTREETOOL — Sitara, 오토모티브, 비전 분석 및 디지털 신호 프로세서용 클록 트리 툴

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:

  • Visualize the device clock tree
  • Interact with clock tree (...)
지원되는 제품 및 하드웨어
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
FCCSP (ABZ) 760 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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