전원 관리 선형 및 저손실(LDO) 레귤레이터

TPS720

활성

350mA, 낮은 VIN(1.1-V), 높은 PSRR, 저 IQ, 저손실 전압 레귤레이터(활성화)

제품 상세 정보

Output options Fixed Output Iout (max) (A) 0.35 Vin (max) (V) 4.5 Vin (min) (V) 1.1 Vout (max) (V) 1.8 Vout (min) (V) 0.9 Fixed output options (V) 0.9, 1, 1.1, 1.2, 1.3, 1.32, 1.5, 1.7, 1.8, 2.3 Noise (µVrms) 48 Iq (typ) (mA) 0.038 Thermal resistance θJA (°C/W) 67 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2 PSRR at 100 KHz (dB) 55 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.35 Vin (max) (V) 4.5 Vin (min) (V) 1.1 Vout (max) (V) 1.8 Vout (min) (V) 0.9 Fixed output options (V) 0.9, 1, 1.1, 1.2, 1.3, 1.32, 1.5, 1.7, 1.8, 2.3 Noise (µVrms) 48 Iq (typ) (mA) 0.038 Thermal resistance θJA (°C/W) 67 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Soft start Accuracy (%) 2 PSRR at 100 KHz (dB) 55 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
DSBGA (YZU) 5 2.02 mm² 1.25 x 1.616 WSON (DRV) 6 4 mm² 2 x 2
  • 350-mA High-Performance LDO
  • Low Quiescent Current: 38 µA
  • Excellent Load Transient Response:
    ±15 mV for ILOAD = 0 mA to 350 mA in 1 µs
  • Excellent Line Transient Response:
    ΔVOUT = ±2 mV for ΔVBIAS = ±600 mV in 1 µs
    ΔVOUT = ±200 µV for ΔVIN = ±400 mV in 1 µs
  • Low Noise: 48 µVRMS (10 Hz to 100 kHz)
  • 80 dB VIN PSRR (10 Hz to 10 kHz)
  • 70 dB VBIAS PSRR (10 Hz to 10 kHz)
  • Fast Start-Up Time: 140 µs
  • Built-In Soft-Start With Monotonic VOUT Rise and Start-Up Current Limited to 100 mA + ILOAD
  • Overcurrent and Thermal Protection
  • Low Dropout: 110 mV at ILOAD = 350 mA
  • Stable with 2.2-µF Output Capacitor
  • Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages
  • 350-mA High-Performance LDO
  • Low Quiescent Current: 38 µA
  • Excellent Load Transient Response:
    ±15 mV for ILOAD = 0 mA to 350 mA in 1 µs
  • Excellent Line Transient Response:
    ΔVOUT = ±2 mV for ΔVBIAS = ±600 mV in 1 µs
    ΔVOUT = ±200 µV for ΔVIN = ±400 mV in 1 µs
  • Low Noise: 48 µVRMS (10 Hz to 100 kHz)
  • 80 dB VIN PSRR (10 Hz to 10 kHz)
  • 70 dB VBIAS PSRR (10 Hz to 10 kHz)
  • Fast Start-Up Time: 140 µs
  • Built-In Soft-Start With Monotonic VOUT Rise and Start-Up Current Limited to 100 mA + ILOAD
  • Overcurrent and Thermal Protection
  • Low Dropout: 110 mV at ILOAD = 350 mA
  • Stable with 2.2-µF Output Capacitor
  • Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages

The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.

The VBIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through VIN, which can be a lower voltage than VBIAS; it can be as low as VOUT + VDO, increasing the efficiency of the solution in many power-sensitive applications. For example, VIN can be an output of a high-efficiency, DC-DC step-down regulator.

The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.

The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic VOUT rise (overshoot limited to 3%) with VIN inrush current limited to 100 mA + ILOAD with an output capacitor of 2.2 µF.

The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
TJ = –40°C to 125°C.

The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.

The VBIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through VIN, which can be a lower voltage than VBIAS; it can be as low as VOUT + VDO, increasing the efficiency of the solution in many power-sensitive applications. For example, VIN can be an output of a high-efficiency, DC-DC step-down regulator.

The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.

The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic VOUT rise (overshoot limited to 3%) with VIN inrush current limited to 100 mA + ILOAD with an output capacitor of 2.2 µF.

The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
TJ = –40°C to 125°C.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
TPS7A10 활성 300mA, 낮은 VIN(0.75), 초저 IQ, 저손실 전압 레귤레이터(활성화 지원) 300-mA, low-IQ, fixed-output LDO regulator that supports lower input/output voltages & provides ultra-low dropout

기술 문서

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모두 보기11
유형 직함 날짜
* Data sheet TPS720 350 mA, Ultra-Low VIN, RF Low-Dropout Linear Regulator With Bias Pin datasheet (Rev. E) PDF | HTML 2015/09/30
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020/08/18
Application note A Topical Index of TI LDO Application Notes (Rev. F) 2019/06/27
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 2018/03/21
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017/08/09
EVM User's guide TPS720xxDRVEVM Evaluation Module 2010/04/29
Application note Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs 2010/03/26
Analog Design Journal Q2 2009 Issue Analog Applications Journal 2009/05/01
Analog Design Journal Taming linear-regulator inrush currents 2009/05/01
User guide TPS720xx 2008/08/19
Application note Inrush Current Limit in the TPS720xx 2008/06/06

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TPS720105DRVEVM — TPS720105 DRV 패키지의 LDO 선형 레귤레이터 평가 모듈

The TPS720105DRVEVM is a fully assembled and tested circuit for evaluating the TPS720105 low-dropout linear regulator in the DRV (2mm x 2mm SON-6) package.
사용 설명서: PDF
TI.com에서 구매할 수 없습니다
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This design allows for performance evaluation of two industrial grade DP83867IR Gigabit Ethernet PHYs and Sitara™ host processors with integrated Ethernet MAC and Switch. It was developed to meet industrial requirements for EMI and EMC. The application firmware implements a driver for the (...)
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회로도: PDF
패키지 다운로드
DSBGA (YZU) 5 옵션 보기
WSON (DRV) 6 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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