TXU0101
- Fully configurable dual-rail design allows each port to operate from 1.1V to 5.5V
- Up to 200Mbps support for 3.3V to 5.0V
- Schmitt-trigger inputs allows for slow and noisy inputs
- Inputs with integrated static pull-down resistors prevent channels from floating
- High drive strength (up to 12mA at 5V)
- Low power consumption:
- 2.5µA maximum (25°C)
- 6µA maximum (–40°C to 125°C)
- VCC isolation and VCC disconnect (Ioff-float) feature
- If either VCC input is <100mV or disconnected, all outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
- Pinout compatible with TXB family level shifters
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22:
- 2500-V human-body model
- 1500-V charged-device model
TXU0101 is a 1-bit, dual-supply noninverting fixed direction voltage level translation device. A pin is referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and B pin is referenced to VCCB logic level. The A port is able to accept input voltages ranging from 1.1V to 5.5V, while the B port can also accept input voltages from 1.1V to 5.5V. Fixed direction data transmission can occur from A to B when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 | |
|---|---|---|---|---|---|---|
| * | 데이터 시트 | TXU0101 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) | PDF | HTML | 2024. 5. 9 | ||
| 애플리케이션 노트 | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024. 10. 2 | |||
| 애플리케이션 노트 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024. 7. 12 | |||
| 애플리케이션 노트 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024. 7. 3 | |||
| Application brief | Enabling Power-Efficient FPGA Designs With Level Translation | PDF | HTML | 2024. 4. 30 | |||
| Product overview | Enabling System on Module Industrial PC Connectivity With Level Translation | PDF | HTML | 2023. 4. 3 | |||
| Application brief | Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat | PDF | HTML | 2023. 1. 17 | |||
| Application brief | Enabling Next Generation Wireless Beacons with Level Translation | PDF | HTML | 2022. 4. 14 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈
5-8-NL-LOGIC-EVM — 5-8핀 DPW, DQE, DRY, DSF, DTM, DTQ 및 DTT 패키지를 지원하는 일반 로직 및 변환 EVM
DTT, DRY, DPW, DTM, DQE, DQM, DSF 또는 DTQ 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 일반 EVM. 보드 설계는 유연한 평가가 가능합니다.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| X2SON (DTQ) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 6 | Ultra Librarian |
| USON (DRY) | 6 | Ultra Librarian |
| SOT-SC70 (DCK) | 6 | Ultra Librarian |