CSD22205L

現行

-8V、P 通道 NexFET™ 功率 MOSFET、單 LGA 1.2 mm x 1.2 mm、9.9 mOhm、閘極 ESD 保護

產品詳細資料

VDS (V) -8 VGS (V) -6 Type P-channel Configuration Single Rds(on) at VGS=4.5 V (max) (mΩ) 9.9 Rds(on) at VGS=2.5 V (max) (mΩ) 15 VGSTH typ (typ) (V) -0.7 QG (typ) (nC) 6.5 QGD (typ) (nC) 1 QGS (typ) (nC) 1.2 ID - silicon limited at TC=25°C (A) 7.4 Logic level Yes Rating Catalog Operating temperature range (°C) -55 to 150
VDS (V) -8 VGS (V) -6 Type P-channel Configuration Single Rds(on) at VGS=4.5 V (max) (mΩ) 9.9 Rds(on) at VGS=2.5 V (max) (mΩ) 15 VGSTH typ (typ) (V) -0.7 QG (typ) (nC) 6.5 QGD (typ) (nC) 1 QGS (typ) (nC) 1.2 ID - silicon limited at TC=25°C (A) 7.4 Logic level Yes Rating Catalog Operating temperature range (°C) -55 to 150
PICOSTAR (YMG) 4 1.3456 mm² (1.16 mm × 1.16 mm)
  • Low resistance
  • Small footprint 1.2 mm × 1.2 mm
  • Low profile 0.36-mm height
  • Lead free
  • Gate-source voltage clamp
  • Gate ESD protection
  • RoHS compliant
  • Halogen free
  • Low resistance
  • Small footprint 1.2 mm × 1.2 mm
  • Low profile 0.36-mm height
  • Lead free
  • Gate-source voltage clamp
  • Gate ESD protection
  • RoHS compliant
  • Halogen free

This –8-V, 8.2-mΩ, 1.2-mm × 1.2-mm Land Grid Array (LGA) NexFET™ device has been designed to deliver the lowest on-resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. The Land Grid Array (LGA) package is a silicon chip scale package with metal pads instead of solder balls.

This –8-V, 8.2-mΩ, 1.2-mm × 1.2-mm Land Grid Array (LGA) NexFET™ device has been designed to deliver the lowest on-resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. The Land Grid Array (LGA) package is a silicon chip scale package with metal pads instead of solder balls.

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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 CSD22205L –8-V P-Channel NexFET™ Power MOSFET datasheet (Rev. B) PDF | HTML 2021/9/8
Application brief Estimating Leakage Currents of Power MOSFETs PDF | HTML 2025/10/31
應用說明 MOSFET Support and Training Tools (Rev. G) PDF | HTML 2025/10/27
應用說明 Semiconductor and IC Package Thermal Metrics (Rev. D) PDF | HTML 2024/3/25
應用說明 Using MOSFET Transient Thermal Impedance Curves In Your Design PDF | HTML 2023/12/18
應用說明 Solving Assembly Issues with Chip Scale Power MOSFETs PDF | HTML 2023/12/14
應用說明 Using MOSFET Safe Operating Area Curves in Your Design PDF | HTML 2023/3/13
Application brief Tips for Successfully Paralleling Power MOSFETs PDF | HTML 2022/5/31
設計指南 FemtoFET Surface Mount Guide (Rev. D) 2016/7/7

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

支援軟體

LOAD-SWITCH-FET-LOSS-CALC — Power Loss Calculation Tool for Load Switch

快速取捨尺寸、成本和性能,以根據應用條件選擇最佳 MOSFET。
支援產品和硬體
模擬型號

CSD22205L Unencrypted PSpice Model (Rev. A)

SLPM298A.ZIP (3 KB) - PSpice 模型
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PICOSTAR (YMG) 4 Ultra Librarian

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