DAC39RF10
- 16-bit, 10.24/20.48GSPS, Multi-Nyquist DAC core
- Maximum input data rate:
- 8-bit, Single channel, DES mode: 20.48GSPS
- 12-bit, Single channel, DES mode: 15.5GSPS
- 16-bit, Single channel: 10.24GSPS
- 8-bit, Dual channel, 10.24GSPS
- 12-bit, Dual channel: 7.75GSPS/ch
- 16-bit, Dual channel: 6.2GSPS/ch
- Output bandwidth (-3dB): 12GHz
- Performance at fOUT = 2.997GHz, DES2XL mode, DEM/Dither off
- Noise floor (small signal): –155dBFS/Hz
- SFDR (-0.1 dBFS) : 60dBc
- IMD3 (-7 dBFS each tone) : –62dBc
- Additive phase noise, 10kHz offset: -138dBc/Hz
- Four integrated digital up-converters (DUC)
- Interpolation: 1x, 2x, 3x, 4x, 6x, 8x ... 256x
- Complex baseband DUC for I/Q output
- Complex to real upconversion for dual channel direct RF sampling
- 64-bit frequency resolution NCOs
- Fast reconfiguration interface for fast frequency hopping
- 4-bit data with 200MHz clock
- 60ns reconfiguration (32-bit frequency)
- Any frequency hopping with phase coherence
- JESD204C Interface
- Up to 16 Lanes at up to 12.8Gbps
- Class C-S, Subclass-1 compatible
- Internal AC coupling capacitors
- SYSREF Windowing for automatic SYSREF timing calibration
The DAC39RF10 and RFS10 are a family of dual and single channel digital-to-analog converters (DAC) with 16-bit resolution. The devices can be used as non-interpolating or interpolating DACs for either direct RF sampling or complex baseband signal generation. The maximum input data rate is 20.48GSPS for a single channel or 10.24GSPS for two channels. The devices can generate signals of up to 10, 7.5, and 5GHz signal bandwidth (8, 12, and 16-bit input resolution) at carrier frequencies exceeding 8GHz enabling direct sampling through C-band and into X-band.
The high sampling rate, output frequency range, 64-bit NCO frequency resolution and any frequency hopping with phase coherence also makes the device capable of arbitrary waveform generation (AWG) and direct digital synthesis (DDS).
A JESD204B and JESD204C compatible serial interface has 16 receiver pairs capable of up to 12.8Gbps. The interface is JESD204B and JESD204C subclass-1 compliant for deterministic latency and multi-device synchronization through the use of SYSREF.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DAC39RF10, DAC39RFS10 10.24, 20.48-GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204B, C Interface datasheet (Rev. B) | PDF | HTML | 2024年 3月 6日 |
| Technical article | So, what are S-parameters anyway? | PDF | HTML | 2019年 5月 23日 |
設計與開發
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PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
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|---|---|---|
| FCBGA (ACK) | 256 | Ultra Librarian |
| FCBGA (ACL) | 256 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
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- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。