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ISO7710-Q1 現行 汽車、穩健 EMC、單通道、強化型數位隔離器 Pin-to-pin upgrade with higher isolation, stronger CMTI, wider supply range and better immunity

產品詳細資料

Rating Automotive Integrated isolated power No Isolation rating Basic Number of channels 1 Forward/reverse channels 1 forward / 0 reverse Default output High Data rate (max) (Mbps) 100 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 25000 Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 5 Supply voltage (min) (V) 3 Propagation delay time (typ) (µs) 0.019 Current consumption per channel (DC) (typ) (mA) 4.3 Creepage (min) (mm) 6 Clearance (min) (mm) 6
Rating Automotive Integrated isolated power No Isolation rating Basic Number of channels 1 Forward/reverse channels 1 forward / 0 reverse Default output High Data rate (max) (Mbps) 100 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 25000 Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 5 Supply voltage (min) (V) 3 Propagation delay time (typ) (µs) 0.019 Current consumption per channel (DC) (typ) (mA) 4.3 Creepage (min) (mm) 6 Clearance (min) (mm) 6
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1:
      –40ºC to 125ºC Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C5
  • 4000-V(peak) Isolation
    • UL 1577, IEC 60747-5-2 (VDE 0884, Rev 2), IEC 61010-1
    • 50-kV/s Transient Immunity (Typ)
  • Signaling Rate 0 Mbps to 100 Mbps
    • Low Propagation Delay
    • Low Pulse Skew
      (Pulse-Width Distortion)
  • Low-Power Sleep Mode
  • High Electromagnetic Immunity
  • Low Input Current Requirement
  • Failsafe Output
  • Drop-In Replacement for Most Optical and Magnetic Isolators

(1) The signaling rate of a line is the number of voltage transitions that occur per second, expressed in the units bps (bits per second).

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1:
      –40ºC to 125ºC Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C5
  • 4000-V(peak) Isolation
    • UL 1577, IEC 60747-5-2 (VDE 0884, Rev 2), IEC 61010-1
    • 50-kV/s Transient Immunity (Typ)
  • Signaling Rate 0 Mbps to 100 Mbps
    • Low Propagation Delay
    • Low Pulse Skew
      (Pulse-Width Distortion)
  • Low-Power Sleep Mode
  • High Electromagnetic Immunity
  • Low Input Current Requirement
  • Failsafe Output
  • Drop-In Replacement for Most Optical and Magnetic Isolators

(1) The signaling rate of a line is the number of voltage transitions that occur per second, expressed in the units bps (bits per second).

The ISO72x-Q1 is a digital isolator with a logic input and output buffer separated by a silicon oxide (SiO2) insulation barrier. This barrier provides galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

The capacitive isolation barrier conditions, translates to a balanced signal, then differentiates a binary input signal. Across the isolation barrier, a differential comparator receives the logic-transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse sent across the barrier ensures the proper dc level of the output. On failure to receive this dc refresh pulse for more than 4 µs, the response of the device is as if the input is or not actively driven, and the failsafe circuit drives the output to a logic-high state.

The symmetry of the dielectric and capacitor within the integrated circuitry provides for close capacitive matching and allows fast transient voltage changes between the input and output grounds without corrupting the output. The small capacitance and resulting time constant provide for fast operation with signaling rates(1) from 0 Mbps (dc) to 100 Mbps.

The device requires two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply, and all outputs are 4-mA CMOS. The device has a TTL input threshold and a noise filter at the input that prevents transient pulses of up to 2 ns in duration from being passed to the output of the device.

The ISO722-Q1 device includes an active-low output enable that, when driven to a high logic level, places the output in a high-impedance state and turns off internal bias circuitry to conserve power.

The ISO72x-Q1 is characterized for operation over the ambient temperature range of –40°C to 125°C.

The ISO72x-Q1 is a digital isolator with a logic input and output buffer separated by a silicon oxide (SiO2) insulation barrier. This barrier provides galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

The capacitive isolation barrier conditions, translates to a balanced signal, then differentiates a binary input signal. Across the isolation barrier, a differential comparator receives the logic-transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse sent across the barrier ensures the proper dc level of the output. On failure to receive this dc refresh pulse for more than 4 µs, the response of the device is as if the input is or not actively driven, and the failsafe circuit drives the output to a logic-high state.

The symmetry of the dielectric and capacitor within the integrated circuitry provides for close capacitive matching and allows fast transient voltage changes between the input and output grounds without corrupting the output. The small capacitance and resulting time constant provide for fast operation with signaling rates(1) from 0 Mbps (dc) to 100 Mbps.

The device requires two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply, and all outputs are 4-mA CMOS. The device has a TTL input threshold and a noise filter at the input that prevents transient pulses of up to 2 ns in duration from being passed to the output of the device.

The ISO722-Q1 device includes an active-low output enable that, when driven to a high logic level, places the output in a high-impedance state and turns off internal bias circuitry to conserve power.

The ISO72x-Q1 is characterized for operation over the ambient temperature range of –40°C to 125°C.

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技術文件

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類型 標題 日期
* Data sheet 3.3-V / 5-V High-Speed Digital Isolator datasheet (Rev. C) 2013年 7月 25日
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024年 4月 30日
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 2024年 1月 31日
White paper Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. C) PDF | HTML 2023年 9月 7日
Certificate CSA Certificate for ISO72xD 2023年 2月 21日
Certificate UL Certificate of Compliance File E181974 Vol 3 Sec 1 2022年 8月 8日
White paper Why are Digital Isolators Certified to Meet Electrical Equipment Standards? 2021年 11月 16日
White paper Distance Through Insulation: How Digital Isolators Meet Certification Requiremen PDF | HTML 2021年 6月 11日
Application brief How to Replace Optocouplers with Digital Isolators in Standard Interface Circuit (Rev. A) PDF | HTML 2021年 5月 19日
EVM User's guide Universal Digital Isolator Evaluation Module PDF | HTML 2021年 3月 4日
Application brief Considerations for Selecting Digital Isolators 2018年 7月 24日

設計與開發

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開發板

DIGI-ISO-EVM — 通用數位隔離器評估模組

DIGI-ISO-EVM 是一款評估模組 (EVM),可評估任何 TI 單通道、雙通道、三通道、四通道或六通道數位隔離器裝置,並提供五種不同封裝 - 8 接腳窄體 SOIC (D)、8 接腳寬體 SOIC (DWV)、16 接腳寬體 SOIC (DWW)、16 接腳超寬體 SOIC (DWW) 和 16 接腳 (DBQ) 封裝。EVM 具備足夠 Berg 接腳選項,可用於評估具最少外部零組件的裝置。

使用指南: PDF | HTML
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模擬型號

ISO722 5V IBIS Model

SLLC283.ZIP (9 KB) - IBIS Model
模擬型號

ISO72x IBIS Model (Rev. A)

SLLC282A.ZIP (15 KB) - IBIS Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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