產品詳細資料

Rating Catalog Integrated isolated power No Isolation rating Reinforced Number of channels 4 Forward/reverse channels 4 forward / 0 reverse Default output High, Low Data rate (max) (Mbps) 100 Surge isolation voltage (VIOSM) (VPK) 12800 Transient isolation voltage (VIOTM) (VPK) 8000 Withstand isolation voltage (VISO) (Vrms) 5700 CMTI (min) (V/µs) 85000 Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.25 Propagation delay time (typ) (µs) 0.0107 Current consumption per channel (DC) (typ) (mA) 0.88 Current consumption per channel (1 Mbps) (typ) (mA) 1.53 Creepage (min) (mm) 8, 14.5 Clearance (min) (mm) 8, 14.5
Rating Catalog Integrated isolated power No Isolation rating Reinforced Number of channels 4 Forward/reverse channels 4 forward / 0 reverse Default output High, Low Data rate (max) (Mbps) 100 Surge isolation voltage (VIOSM) (VPK) 12800 Transient isolation voltage (VIOTM) (VPK) 8000 Withstand isolation voltage (VISO) (Vrms) 5700 CMTI (min) (V/µs) 85000 Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.25 Propagation delay time (typ) (µs) 0.0107 Current consumption per channel (DC) (typ) (mA) 0.88 Current consumption per channel (1 Mbps) (typ) (mA) 1.53 Creepage (min) (mm) 8, 14.5 Clearance (min) (mm) 8, 14.5
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOIC (DWW) 16 177.675 mm² 10.3 x 17.25
  • Signaling Rate: Up to 100 Mbps
  • Wide Supply Range: 2.25 V to 5.5 V
  • 2.25-V to 5.5-V Level Translation
  • Wide Temperature Range: –55°C to +125°C
  • Low-Power Consumption, Typical 1.7 mA per Channel at 1 Mbps
  • Low Propagation Delay: 11 ns Typical
    (5-V Supplies)
  • Industry leading CMTI (Min): ±100 kV/µs
  • Robust Electromagnetic Compatibility (EMC)
  • System-Level ESD, EFT, and Surge Immunity
  • Low Emissions
  • Isolation Barrier Life: >40 Years
  • Wide Body SOIC-16 Package and Extra-Wide Body SOIC-16 Package Options
  • Safety and Regulatory Approvals:
    • 8000-VPK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5.7-kVRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 End Equipment Standards
    • CQC Certification per GB4943.1-2011
    • TUV Certification per EN 61010-1 and EN 60950-1
    • All DW Package Certifications Complete; DWW Package Certifications Complete per UL, VDE, TUV and Planned for CSA and CQC
  • Signaling Rate: Up to 100 Mbps
  • Wide Supply Range: 2.25 V to 5.5 V
  • 2.25-V to 5.5-V Level Translation
  • Wide Temperature Range: –55°C to +125°C
  • Low-Power Consumption, Typical 1.7 mA per Channel at 1 Mbps
  • Low Propagation Delay: 11 ns Typical
    (5-V Supplies)
  • Industry leading CMTI (Min): ±100 kV/µs
  • Robust Electromagnetic Compatibility (EMC)
  • System-Level ESD, EFT, and Surge Immunity
  • Low Emissions
  • Isolation Barrier Life: >40 Years
  • Wide Body SOIC-16 Package and Extra-Wide Body SOIC-16 Package Options
  • Safety and Regulatory Approvals:
    • 8000-VPK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5.7-kVRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 End Equipment Standards
    • CQC Certification per GB4943.1-2011
    • TUV Certification per EN 61010-1 and EN 60950-1
    • All DW Package Certifications Complete; DWW Package Certifications Complete per UL, VDE, TUV and Planned for CSA and CQC

The ISO7840x device is a high-performance, quad-channel digital isolator with a 8000-VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low-power consumption, while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by a silicon-dioxide (SiO2) insulation barrier.

This device comes with enable pins that can be used to put the respective outputs in high impedance for multi-master driving applications and to reduce power consumption. The ISO7840 device has four forward and zero reverse-direction channels. If the input power or signal is lost, the default output is high for the ISO7840 device and low for the ISO7840F device. See the Device Functional Modes section for further details.

Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of the ISO7840 device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance.

The ISO7840 device is available in 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages.

The ISO7840x device is a high-performance, quad-channel digital isolator with a 8000-VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low-power consumption, while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by a silicon-dioxide (SiO2) insulation barrier.

This device comes with enable pins that can be used to put the respective outputs in high impedance for multi-master driving applications and to reduce power consumption. The ISO7840 device has four forward and zero reverse-direction channels. If the input power or signal is lost, the default output is high for the ISO7840 device and low for the ISO7840F device. See the Device Functional Modes section for further details.

Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of the ISO7840 device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance.

The ISO7840 device is available in 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages.

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類型 標題 日期
* Data sheet ISO7840x High-Performance, 8000-VPK Reinforced Quad-Channel Digital Isolator datasheet (Rev. B) PDF | HTML 2016年 4月 15日
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024年 4月 30日
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 2024年 2月 29日
Application note Digital Isolator Design Guide (Rev. G) PDF | HTML 2023年 9月 13日
White paper Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. C) PDF | HTML 2023年 9月 7日
White paper Circuit Board Insulation Design According to IEC60664 for Motor Drive Apps PDF | HTML 2023年 8月 31日
Certificate CQC Certificate for ISOxxDWx (Rev. J) 2023年 3月 27日
Certificate CSA Certificate for ISO78xxDWx 2023年 3月 13日
Certificate TUV Certificate for Isolation Devices (Rev. K) 2022年 8月 5日
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 6 (Rev. P) 2022年 8月 5日
White paper Why are Digital Isolators Certified to Meet Electrical Equipment Standards? 2021年 11月 16日
White paper Distance Through Insulation: How Digital Isolators Meet Certification Requiremen PDF | HTML 2021年 6月 11日
EVM User's guide Universal Digital Isolator Evaluation Module PDF | HTML 2021年 3月 4日
Functional safety information Isolation in AC Motor Drives: Understanding the IEC 61800-5-1 Safety Standard (Rev. A) 2019年 9月 19日
Analog Design Journal Pushing the envelope with high-performance digital-isolation technology (Rev. A) 2018年 8月 22日
Application brief Considerations for Selecting Digital Isolators 2018年 7月 24日
Functional safety information Isolation in solar power converters: Understanding the IEC62109-1 safety standar (Rev. A) 2018年 5月 18日
Analog Design Journal How to reduce radiated emissions of digital isolators for systems with RF module 2018年 3月 26日
Application note Isolation Glossary (Rev. A) 2017年 9月 19日
Analog Design Journal 4Q 2015 Analog Applications Journal 2015年 10月 30日
Analog Design Journal Pushing the envelope with high-performance digital-isolation technology 2015年 10月 30日
EVM User's guide ISO784xx Quad-Channel Digital Isolator EVM User Guide 2014年 10月 17日

設計與開發

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開發板

DIGI-ISO-EVM — 通用數位隔離器評估模組

DIGI-ISO-EVM 是一款評估模組 (EVM),可評估任何 TI 單通道、雙通道、三通道、四通道或六通道數位隔離器裝置,並提供五種不同封裝 - 8 接腳窄體 SOIC (D)、8 接腳寬體 SOIC (DWV)、16 接腳寬體 SOIC (DWW)、16 接腳超寬體 SOIC (DWW) 和 16 接腳 (DBQ) 封裝。EVM 具備足夠 Berg 接腳選項,可用於評估具最少外部零組件的裝置。

使用指南: PDF | HTML
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開發板

ISO7842-EVM — 高抗擾度、5.7kVRMS 強化四通道 2/2 數位隔離器評估模組

The ISO7842 provides galvanic isolation up to 5700 VRMS for 1 minute per UL and 8000 VPK per VDE. This device has four isolated channels comprised of a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. Used in conjunction with isolated power supplies, this (...)

使用指南: PDF
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模擬型號

ISO7840 IBIS Model (Rev. A)

SLLM281A.ZIP (52 KB) - IBIS Model
模擬型號

ISO7840F IBIS Model (Rev. A)

SLLM282A.ZIP (52 KB) - IBIS Model
參考設計

TIDA-01037 — 可實現最大 SNR 和取樣率的 20 位元 1 MSPS 隔離器最佳化資料採集參考設計

TIDA-01037 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design that utilizes two different isolator devices to maximize signal chain SNR and sample rate performance. For signals requiring low jitter, such as ADC sampling clocks, TI’s ISO73xx family of low jitter (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01035 — 最佳化抖動以實現最大 SNR 和取樣率的 20 位元隔離式資料採集參考設計

The TIDA-01035 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design demonstrating how to resolve and optimize performance challenges typical of digitally isolated data acquisition systems.
  • Significantly improves high frequency AC signal chain performance (SNR  and THD) by (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00732 — 可實現最大 SNR 和採樣率的 18 位元 2 MSPS 隔離式資料採集參考設計

This “18-bit, 2-Msps Isolated Data Acquisition Reference Design to achieve maximum SNR and sampling rate”  illustrates how to overcome performance-limiting challenges typical of isolated data acquisition system design:
  • Maximizing sampling rate by minimizing propagation delay introduced by digital (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (DW) 16 Ultra Librarian
SOIC (DWW) 16 Ultra Librarian

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