產品詳細資料

PGA/VGA PGA Number of channels 1 Vs (min) (V) 4.75 Vs (max) (V) 5.25 Input type Single-ended Output type Differential Interface type Digital Gain Set BW at Acl (MHz) 900 Acl, min spec gain (V/V) 0.875 Voltage gain (min) (V/V) 0.875 Voltage gain (max) (V/V) 87 Gain (max) (dB) 38.8 Architecture Fully Differential ADC Driver Features Integrated Clamps, Single-ended to Differential conversion Input voltage noise (typ) (µV√Hz) 0.000098 Slew rate (typ) (V/µs) 760 Iq per channel (typ) (mA) 210 Rating Catalog Operating temperature range (°C) -40 to 85
PGA/VGA PGA Number of channels 1 Vs (min) (V) 4.75 Vs (max) (V) 5.25 Input type Single-ended Output type Differential Interface type Digital Gain Set BW at Acl (MHz) 900 Acl, min spec gain (V/V) 0.875 Voltage gain (min) (V/V) 0.875 Voltage gain (max) (V/V) 87 Gain (max) (dB) 38.8 Architecture Fully Differential ADC Driver Features Integrated Clamps, Single-ended to Differential conversion Input voltage noise (typ) (µV√Hz) 0.000098 Slew rate (typ) (V/µs) 760 Iq per channel (typ) (mA) 210 Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RGH) 16 16 mm² (4 mm × 4 mm)
  • Gain range: 40dB
  • Gain step size: 2dB
  • Combined gain resolution with GSPS ADCs: 8.5mdB
  • Minimum gain: −1.16dB
  • Maximum gain: 38.8dB
  • −3dB bandwidth (BW): 900MHz
  • Rise and fall time: < 500ps
  • Recovery time: < 5ns
  • Propagation delay variation: 100ps
  • HD2 at 100MHz: −50dBc
  • HD3 at 100MHz: −53dBc
  • Input-referred noise (maximum gain): 0.98nV/√Hz
  • Overvoltage clamps for fast recovery
  • Power consumption: auxiliary turned off 1.1W to 0.75W
  • Gain range: 40dB
  • Gain step size: 2dB
  • Combined gain resolution with GSPS ADCs: 8.5mdB
  • Minimum gain: −1.16dB
  • Maximum gain: 38.8dB
  • −3dB bandwidth (BW): 900MHz
  • Rise and fall time: < 500ps
  • Recovery time: < 5ns
  • Propagation delay variation: 100ps
  • HD2 at 100MHz: −50dBc
  • HD3 at 100MHz: −53dBc
  • Input-referred noise (maximum gain): 0.98nV/√Hz
  • Overvoltage clamps for fast recovery
  • Power consumption: auxiliary turned off 1.1W to 0.75W

The LMH6518 is a digitally controlled variable gain amplifier with a total gain that varies from –1.16dB to 38.8dB for a 40dB range in 2dB steps. The −3dB bandwidth is 900MHz at all gains. Gain accuracy at each setting is typically 0.1dB. When used in conjunction with TI’s gigasamples per second (GSPS) ADC with adjustable full-scale range, the LMH6518 gain adjustment accommodates full scale input signals from 6.8mVPP to 920mVPP to get 700mVPP nominal at the ADC input. The auxiliary output (+OUT AUX and −OUT AUX) follows the main output and is intended for use in oscilloscope trigger function circuitry, but can have other uses in other applications.

The LMH6518 gain is programmed through a SPI-compatible serial bus. A signal path combined gain resolution of 8.5mdB is achieved when the device gain and the GSPS ADC FS input are both manipulated. Inputs and outputs are dc-coupled. The outputs are differential with individual common-mode voltage control (for main and auxiliary outputs), and have selectable bandwidth limiting circuitry (common to both main and auxiliary) of 20MHz, 100MHz, 200MHz, 350MHz, 650MHz, 750MHz, or full BW.

The LMH6518 is a digitally controlled variable gain amplifier with a total gain that varies from –1.16dB to 38.8dB for a 40dB range in 2dB steps. The −3dB bandwidth is 900MHz at all gains. Gain accuracy at each setting is typically 0.1dB. When used in conjunction with TI’s gigasamples per second (GSPS) ADC with adjustable full-scale range, the LMH6518 gain adjustment accommodates full scale input signals from 6.8mVPP to 920mVPP to get 700mVPP nominal at the ADC input. The auxiliary output (+OUT AUX and −OUT AUX) follows the main output and is intended for use in oscilloscope trigger function circuitry, but can have other uses in other applications.

The LMH6518 gain is programmed through a SPI-compatible serial bus. A signal path combined gain resolution of 8.5mdB is achieved when the device gain and the GSPS ADC FS input are both manipulated. Inputs and outputs are dc-coupled. The outputs are differential with individual common-mode voltage control (for main and auxiliary outputs), and have selectable bandwidth limiting circuitry (common to both main and auxiliary) of 20MHz, 100MHz, 200MHz, 350MHz, 650MHz, 750MHz, or full BW.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 LMH6518 900MHz, Digitally Controlled Variable Gain Amplifier datasheet (Rev. E) PDF | HTML 2024/7/31
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28
應用說明 AN-1719 Noise Figure Analysis Fully Differential Amplifier (Rev. A) 2013/5/1
應用說明 AN-1718 Differential Amplifier Applications Up to 400 MHz (Rev. B) 2013/5/1
應用說明 Using High Speed Diff Amp to Drive ADCs (Rev. A) 2013/4/26
更多文件說明 Featured High Speed Differential Amplifiers 2012/10/23
應用說明 A Walk Along the Signal Path (High-Speed Signal Path) 2005/3/30

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開發板

LMH6518EVM — LMH6518 評估模組

LMH6518 評估模組 (EVM) 旨在協助分析 LMH6518 差動放大器的特性。易於使用的評估板旨在提供快速設定,並提供高性能訊號分析。EVM 隨時皆可透過使用板載連接器,連接電源供應器、訊號來源和測試儀器。
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SNOC007 — LMH6518 GUI Set Up Files

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LMH6518DESIGN-CALC — LMH6518 應用資訊 FS 增益 ECM 計算機

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參考設計

TIDA-010133 — 高阻抗、500 MHZ 頻寬示波器類比前端參考設計

High Bandwidth data acquisition systems, like a digital storage oscilloscope (DSO), require the analog front-end (AFE) signal chain to have wide (-3dB) bandwidth to measure a wide range of signals, optional high input impedance to prevent loading of the measured signal, low noise to prevent (...)
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WQFN (RGH) 16 Ultra Librarian

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