產品詳細資料

Function Level translator, Single-ended Additive RMS jitter (typ) (fs) 30 Output frequency (max) (MHz) 200 Number of outputs 10 Output supply voltage (V) 1.5, 1.8, 2.5, 3.3 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 25 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS
Function Level translator, Single-ended Additive RMS jitter (typ) (fs) 30 Output frequency (max) (MHz) 200 Number of outputs 10 Output supply voltage (V) 1.5, 1.8, 2.5, 3.3 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 25 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS
WQFN (RTV) 32 25 mm² 5 x 5
  • 10 LVCMOS/LVTTL Outputs, DC to 200 MHz
  • Universal Input
    • LVPECL
    • LVDS
    • HCSL
    • SSTL
    • LVCMOS / LVTTL
  • Crystal Oscillator Interface
    • Crystal Input Frequency: 10 to 40 MHz
  • Output Skew: 6 ps
  • Additive Phase Jitter
    • 30 fs at 156.25 MHz (12 kHz to 20 MHz)
  • Low Propagation Delay
  • Operates with 3.3 or 2.5 V Core Supply Voltage
  • Adjustable Output Power Supply
    • 1.5 V, 1.8 V, 2.5 V, and 3.3 V For Each Bank
  • 32 pin WQFN Package 5.0 × 5.0 × 0.8 mm
  • 10 LVCMOS/LVTTL Outputs, DC to 200 MHz
  • Universal Input
    • LVPECL
    • LVDS
    • HCSL
    • SSTL
    • LVCMOS / LVTTL
  • Crystal Oscillator Interface
    • Crystal Input Frequency: 10 to 40 MHz
  • Output Skew: 6 ps
  • Additive Phase Jitter
    • 30 fs at 156.25 MHz (12 kHz to 20 MHz)
  • Low Propagation Delay
  • Operates with 3.3 or 2.5 V Core Supply Voltage
  • Adjustable Output Power Supply
    • 1.5 V, 1.8 V, 2.5 V, and 3.3 V For Each Bank
  • 32 pin WQFN Package 5.0 × 5.0 × 0.8 mm

The LMK00101 is a high performance, low noise LVCMOS fanout buffer which can distribute 10 ultra-low jitter clocks from a differential, single ended, or crystal input. The LMK00101 supports synchronous output enable for glitch free operation. The ultra low-skew, low-jitter, and high PSRR make this buffer ideally suited for various networking, telecom, server and storage area networking, RRU LO reference distribution, medical and test equipment applications.

The core voltage can be set to 2.5 or 3.3 V, while the output voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00101 can be easily configured through pin programming.

The LMK00101 is a high performance, low noise LVCMOS fanout buffer which can distribute 10 ultra-low jitter clocks from a differential, single ended, or crystal input. The LMK00101 supports synchronous output enable for glitch free operation. The ultra low-skew, low-jitter, and high PSRR make this buffer ideally suited for various networking, telecom, server and storage area networking, RRU LO reference distribution, medical and test equipment applications.

The core voltage can be set to 2.5 or 3.3 V, while the output voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00101 can be easily configured through pin programming.

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類型 標題 日期
* Data sheet Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator w/ Universal Input datasheet (Rev. C) 2013年 5月 3日
User guide LMK00101 User’s Guide (Rev. A) 2019年 7月 1日

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模擬型號

LMK00101 IBIS Model (Rev. A)

SNAM062A.ZIP (76 KB) - IBIS Model
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CLOCK-TREE-ARCHITECT — 時鐘樹架構程式設計軟體

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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WQFN (RTV) 32 Ultra Librarian

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