SN54SC8T164-SEP
- Vendor item drawing available, VID V62/25620-01XE
- Radiation - Total Ionizing Dose
(TID):
- TID characterized up to 50krad(Si)
- TID performance assurance up to 30krad(Si)
- Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
- Radiation - Single-Event Effects (SEE):
- Single Event Latch-Up (SEL) immune up to 50MeV-cm2/mg at 125°C
- Single Event Transient (SET) characterized up to LET = 50MeV-cm2/mg
-
Wide operating range of 1.2V to 5.5V
-
Single-supply voltage translator:
-
Up translation:
-
1.2V to 1.8V
-
1.5V to 2.5V
-
1.8V to 3.3V
-
3.3V to 5.0V
-
-
Down translation:
- 5.0V, 3.3V, 2.5V to 1.8V
- 5.0V, 3.3V to 2.5V
- 5.0V to 3.3V
-
- 5.5V tolerant input pins
- Supports standard pinouts
- Up to 150Mbps with 5V or 3.3V VCC
- Latch-up performance exceeds 250mA per JESD 17
- Space enhanced plastic:
- Supports defense and aerospace applications
- Controlled baseline
- Au bondwire and NiPdAu lead finish
- Meets NASA ASTM E595 outgassing specification
- One fabrication, assembly, and test site
- Extended product life cycle
- Product traceability
The SN54SC8T164-SEP device contains an 8-bit shift register with AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set-up time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.
The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN54SC8T164-SEP Radiation Tolerant, 8-Bit Parallel-Out Serial Shift Registers datasheet | PDF | HTML | 2025/1/20 | ||
| * | 輻射及可靠性報告 | SN54SC8T595-SEP Single-Event Effects (SEE) Radiation Report (Rev. A) | PDF | HTML | 2025/3/5 | ||
| * | 輻射及可靠性報告 | SN54SC8T164-SEP Production Flow and Reliability Report | PDF | HTML | 2025/2/20 | ||
| * | 輻射及可靠性報告 | SN54SC8T164-SEP Total Ionizing Dose (TID) Report | 2025/2/18 |
設計與開發
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