產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 BW at Acl (MHz) 370 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 2800 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 6.8 Iq per channel (typ) (mA) 23 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 120 2nd harmonic (dBc) 83 3rd harmonic (dBc) 97 Frequency of harmonic distortion measurement (MHz) 8 GBW (typ) (MHz) 300 Input bias current (max) (pA) 4600000 Features Shutdown CMRR (typ) (dB) 80 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 BW at Acl (MHz) 370 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 2800 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 6.8 Iq per channel (typ) (mA) 23 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 120 2nd harmonic (dBc) 83 3rd harmonic (dBc) 97 Frequency of harmonic distortion measurement (MHz) 8 GBW (typ) (MHz) 300 Input bias current (max) (pA) 4600000 Features Shutdown CMRR (typ) (dB) 80 Rating Catalog
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Fully Differential Architecture
  • Bandwidth: 370 MHz
  • Slew Rate: 2800 V/µs
  • IMD3: -95 dBc at 30 MHz
  • OIP3: 51 dBm at 30 MHz
  • Output Common-Mode Control
  • Wide Power Supply Voltage Range: 5 V, ±5 V, 12 V, 15 V
  • Centered Input Common-Mode Range
  • Power-Down Capability (THS4502)
  • Evaluation Module Available
  • Fully Differential Architecture
  • Bandwidth: 370 MHz
  • Slew Rate: 2800 V/µs
  • IMD3: -95 dBc at 30 MHz
  • OIP3: 51 dBm at 30 MHz
  • Output Common-Mode Control
  • Wide Power Supply Voltage Range: 5 V, ±5 V, 12 V, 15 V
  • Centered Input Common-Mode Range
  • Power-Down Capability (THS4502)
  • Evaluation Module Available

The THS4502 and THS4503 are high-performance fully differential amplifiers from Texas Instruments. The THS4502, featuring power-down capability, and the THS4503, without power-down capability, set new performance standards for fully differential amplifiers with unsurpassed linearity, supporting 14-bit operation through 40 MHz. Package options include the 8-pin SOIC and the 8-pin MSOP with PowerPAD for a smaller footprint, enhanced ac performance, and improved thermal dissipation capability.

The THS4502 and THS4503 are high-performance fully differential amplifiers from Texas Instruments. The THS4502, featuring power-down capability, and the THS4503, without power-down capability, set new performance standards for fully differential amplifiers with unsurpassed linearity, supporting 14-bit operation through 40 MHz. Package options include the 8-pin SOIC and the 8-pin MSOP with PowerPAD for a smaller footprint, enhanced ac performance, and improved thermal dissipation capability.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
引腳對引腳且具備與所比較裝置相同的功能
LMH6551 現行 370MHz 差動高速運算放大器 Lower power (12.5 mA), lower noise (6 nV/rtHz), wider temperature range (-40 C to 85 C), and lower offset drift (0.8 uV/C)

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 5
類型 標題 日期
* Data sheet Wideband, Low-Distortion Fully Differential Amplifiers. datasheet (Rev. E) 2011年 10月 7日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Analog Design Journal Analysis of fully differential amplifiers 2005年 3月 11日
Analog Design Journal Fully differential amplifiers applications:Line termination,driving high-speed.. 2005年 3月 2日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

THS4503 PSpice Model (Rev. A)

SLOJ157A.ZIP (41 KB) - PSpice Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HVSSOP (DGN) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片