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ESD 防護二極體

TPD2E007

現行

適用 AC 訊號資料介面的雙 10-pF、±13-V、±8-kV ESD 防護二極體

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產品規格表

TPD2E007

現行
產品規格表 立即訂購

產品詳細資料

Package name LGA (PicoStar), SOT-SC70 Peak pulse power (8/20 μs) (max) (W) 0.27 Vrwm (V) 13 Bi-/uni-directional Bi-directional Number of channels 2 IO capacitance (typ) (pF) 10 Clamping voltage (V) 20 Breakdown voltage (min) (V) 14
Package name LGA (PicoStar), SOT-SC70 Peak pulse power (8/20 μs) (max) (W) 0.27 Vrwm (V) 13 Bi-/uni-directional Bi-directional Number of channels 2 IO capacitance (typ) (pF) 10 Clamping voltage (V) 20 Breakdown voltage (min) (V) 14
PICOSTAR (YFM) 4 0.5929 mm² 0.77 x 0.77 SOT-SC70 (DCK) 3 4.2 mm² 2 x 2.1
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±8-kV IEC 61000-4-2 Contact Discharge
    • ±15-kV IEC 61000-4-2 Air-Gap Discharge
  • IEC 61000-4-5 Surge Protection
    • 4.5-A Peak Pulse Current (8/20-µs Pulse)
  • IO Capacitance 15 pF (Max)
  • Low 50-nA Leakage Current
  • Space-Saving PicoStar™ and SOT Package
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±8-kV IEC 61000-4-2 Contact Discharge
    • ±15-kV IEC 61000-4-2 Air-Gap Discharge
  • IEC 61000-4-5 Surge Protection
    • 4.5-A Peak Pulse Current (8/20-µs Pulse)
  • IO Capacitance 15 pF (Max)
  • Low 50-nA Leakage Current
  • Space-Saving PicoStar™ and SOT Package

This device is a transient voltage suppressor (TVS) based electrostatic discharge (ESD) protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, and so forth) without compromising signal integrity. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector.

The TPD2E007 is offered in a 4-bump PicoStar and 3-pin SOT (DGK) packages. The PicoStar package (YFM), with only 0.15 mm (Max) package height, is recommended for ultra space saving application where the package height is a key concern. The PicoStar package can be used in either embedded PCB board applications or in surface mount applications. The industry standard SOT package offers straightforward board layout option in legacy designs.

This device is a transient voltage suppressor (TVS) based electrostatic discharge (ESD) protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, and so forth) without compromising signal integrity. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector.

The TPD2E007 is offered in a 4-bump PicoStar and 3-pin SOT (DGK) packages. The PicoStar package (YFM), with only 0.15 mm (Max) package height, is recommended for ultra space saving application where the package height is a key concern. The PicoStar package can be used in either embedded PCB board applications or in surface mount applications. The industry standard SOT package offers straightforward board layout option in legacy designs.
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類型 標題 日期
* Data sheet TPD2E007 2-Channel ESD Protection Array for AC-Coupled/Negative-Rail Data Interfaces datasheet (Rev. I) PDF | HTML 2016年 3月 22日
Selection guide System-Level ESD Protection Guide (Rev. D) 2022年 9月 7日
Application note ESD Packaging and Layout Guide (Rev. B) PDF | HTML 2022年 8月 18日
White paper Designing USB for short-to-battery tolerance in automotive environments 2016年 2月 10日
Analog Design Journal Design Considerations for System-Level ESD Circuit Protection 2012年 9月 25日

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ESDEVM — 通用 ESD 評估模組

<p>The electrostatic-sensitive device (ESD) evaluation module (EVM) is a development platform for most of our ESD portfolio. The board comes with all traditional ESD footprints in order to test any number of devices. Devices can be soldered onto their respect footprint and then tested.</p>
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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封裝 引腳 下載
PICOSTAR (YFM) 4 檢視選項
SOT-SC70 (DCK) 3 檢視選項
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