TPS28225
- Drives Two N-Channel MOSFETs with 14ns Adaptive Dead Time
- Wide Gate Drive Voltage: 4.5V Up to 8.8V With Best Efficiency at 7V to 8V
- Wide Power System Train Input Voltage: 3V Up to 27V
- Wide Input PWM Signals: 2.0V up to 13.2V Amplitude
- Capable to Drive MOSFETs with ≥40A Current per Phase
- High Frequency Operation: 14ns Propagation Delay and 10ns Rise/Fall Time Allow FSW – 2MHz
- Capable to Propagate <30ns Input PWM Pulses
- Low-Side Driver Sink On-Resistance (0.4Ω) Prevents dV/dT Related Shoot-Through Current
- 3-State PWM Input for Power Stage Shutdown
- Space Saving Enable (Input) and Power Good (Output) Signals on Same Pin
- Thermal Shutdown
- UVLO Protection
- Internal Bootstrap Diode
- Economical SOIC-8 and Thermally Enhanced 3mm x 3mm VSON-8 Packages
- High Performance Replacement for Popular 3-State Input Drivers
The TPS28225 is a high-speed driver for N-channel complimentary driven power MOSFETs with adaptive dead-time control. This driver is optimized for use in variety of high-current one and multi-phase DC-to-DC converters. The TPS28225 is a solution that provides high efficiency, small size and low EMI emissions.
The efficiency is achieved by up to 8.8V gate drive voltage, 14ns adaptive dead-time control, 14ns propagation delays and high-current 2A source and 4A sink drive capability. The 0.4Ω impedance for the lower gate driver holds the gate of power MOSFET below its threshold and ensures no shoot-through current at high dV/dt phase node transitions. The bootstrap capacitor charged by an internal diode allows use of N-channel MOSFETs in a half-bridge configuration.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS28225 High-Frequency 4A Sink Synchronous MOSFET Driver datasheet (Rev. E) | PDF | HTML | 2024年 1月 19日 |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020年 2月 28日 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020年 2月 28日 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| More literature | Power Loss Calculation for Sync Buck Converter | 2007年 2月 14日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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