TPS51103

現行

適用筆記本電腦且具切換電路的整合式 LDO

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.1 Vin (max) (V) 28 Vin (min) (V) 4.5 Vout (max) (V) 3.3 Vout (min) (V) 3.3 Fixed output options (V) 3.3, 5 Iq (typ) (mA) 0.0354 Thermal resistance θJA (°C/W) 80 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 3 Features Enable Accuracy (%) 4 Dropout voltage (Vdo) (typ) (mV) 400 Operating temperature range (°C) -40 to 85
Output options Fixed Output Iout (max) (A) 0.1 Vin (max) (V) 28 Vin (min) (V) 4.5 Vout (max) (V) 3.3 Vout (min) (V) 3.3 Fixed output options (V) 3.3, 5 Iq (typ) (mA) 0.0354 Thermal resistance θJA (°C/W) 80 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 3 Features Enable Accuracy (%) 4 Dropout voltage (Vdo) (typ) (mV) 400 Operating temperature range (°C) -40 to 85
VSON (DRC) 10 9 mm² 3 x 3
  • Wide Input Voltage Range: 4.5 V to 28 V
  • 5-V/3.3-V, 100-mA, LDO Output
  • Glitch Free Switch Over Circuit
  • Always-On 3.3-V, 5-mA LDO Output for RTC
  • 250 kHz Clock Output for Charge Pump
  • Thermal Shutdown (Non-latch)
  • 10Ld QFN (DRC) Package
  • APPLICATIONS
    • Notebook Computers
    • Mobile Digital Consumer Products

  • Wide Input Voltage Range: 4.5 V to 28 V
  • 5-V/3.3-V, 100-mA, LDO Output
  • Glitch Free Switch Over Circuit
  • Always-On 3.3-V, 5-mA LDO Output for RTC
  • 250 kHz Clock Output for Charge Pump
  • Thermal Shutdown (Non-latch)
  • 10Ld QFN (DRC) Package
  • APPLICATIONS
    • Notebook Computers
    • Mobile Digital Consumer Products

The TPS51103 integrates three LDOs. The 5-V and 3.3-V LDOs are both rated at 100 mA and also include a glitch-free switch-over feature allowing for optimized battery life. An additional 3.3-V LDO is designed to provide an always on power output for the real time clock (RTC). The TPS51103 integrates a clock output to use with an external charge pump. The TPS51103 offers an innovative solution for optimizing the complex and multiple power rails typically found in a Notebook Computer. The TPS51103 is available in the 10-pin QFN package and is specified from –40°C to 85°C.

The TPS51103 integrates three LDOs. The 5-V and 3.3-V LDOs are both rated at 100 mA and also include a glitch-free switch-over feature allowing for optimized battery life. An additional 3.3-V LDO is designed to provide an always on power output for the real time clock (RTC). The TPS51103 integrates a clock output to use with an external charge pump. The TPS51103 offers an innovative solution for optimizing the complex and multiple power rails typically found in a Notebook Computer. The TPS51103 is available in the 10-pin QFN package and is specified from –40°C to 85°C.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4
類型 標題 日期
* Data sheet Integrated LDO With Switch-Over Circuit datasheet 2008年 1月 9日
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020年 8月 18日
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日
EVM User's guide Using the TPS51103EVM (Rev. A) 2008年 9月 1日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

TPS51103 TINA-TI Spice Model

SLUM147.ZIP (19 KB) - TINA-TI Spice Model
模擬型號

TPS51103 TINA-TI Transient Reference Design

SLUM146.TSC (185 KB) - TINA-TI Reference Design
模擬型號

TPS51103 Unencrypted PSpice Transient Model Package (Rev. A)

SLIM090A.ZIP (1440 KB) - PSpice Model
封裝 引腳 下載
VSON (DRC) 10 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片