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線性與低壓差 (LDO) 穩壓器

TPS7A21

現行

500-mA、低雜訊超低 IQ 高 PSRR 低壓差 (LDO) 穩壓器

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TPS7A21

現行
產品規格表 立即訂購

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.5 Vin (max) (V) 6 Vin (min) (V) 2 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 2.8, 3.3, 3.45 Noise (µVrms) 7.7 Iq (typ) (mA) 0.007 Thermal resistance θJA (°C/W) 187.1, 197.1 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 PSRR at 100 KHz (dB) 61 Dropout voltage (Vdo) (typ) (mV) 130 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.5 Vin (max) (V) 6 Vin (min) (V) 2 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 2.8, 3.3, 3.45 Noise (µVrms) 7.7 Iq (typ) (mA) 0.007 Thermal resistance θJA (°C/W) 187.1, 197.1 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 PSRR at 100 KHz (dB) 61 Dropout voltage (Vdo) (typ) (mV) 130 Operating temperature range (°C) -40 to 125
POWERWCSP (YWD) 4 See data sheet
  • Very low IQ: 6.5 µA
  • Input voltage range: 2.0 V to 6.0 V
  • Output voltage range: 0.8 V to 5.5 V (50-mV steps)
  • High PSRR: 91 dB at 1 kHz
  • Low output voltage noise: 7.7 µVRMS
  • Low dropout:
    • 175 mV (maximum) at 500 mA (2.5-V VOUT)
  • Smart EN pulldown
  • Output voltage tolerance:
    • ±1.5% (line, load, and temperature)
  • Supports wide range of ceramic capacitors:
    • 1 µF to 200 µF
  • Operating junction temperature: –40°C to +125°C
  • Package:

    • 0.602-mm × 0.602-mm power DSBGA
  • Very low IQ: 6.5 µA
  • Input voltage range: 2.0 V to 6.0 V
  • Output voltage range: 0.8 V to 5.5 V (50-mV steps)
  • High PSRR: 91 dB at 1 kHz
  • Low output voltage noise: 7.7 µVRMS
  • Low dropout:
    • 175 mV (maximum) at 500 mA (2.5-V VOUT)
  • Smart EN pulldown
  • Output voltage tolerance:
    • ±1.5% (line, load, and temperature)
  • Supports wide range of ceramic capacitors:
    • 1 µF to 200 µF
  • Operating junction temperature: –40°C to +125°C
  • Package:

    • 0.602-mm × 0.602-mm power DSBGA

The TPS7A21 is an ultra-small, low-dropout (LDO) linear voltage regulator that can source 500 mA of output current. The device provides low noise, high PSRR, and excellent load and line transient performance to meet the requirements of RF and other sensitive analog circuits. Innovative design techniques result in low-noise performance without the addition of an external noise bypass capacitor. With the device low quiescent current, the TPS7A21 is a good choice for battery-powered systems. The 2.0-V to 6.0-V input voltage range and 0.8-V to 5.5-V output voltage range support a variety of system requirements. The internal precision reference circuit enables excellent accuracy; the maximum output voltage tolerance is 1.5% over load, line, and temperature variations.

An internal soft-start circuit helps control the inrush current, thus minimizing the input voltage drop during start up. The LDO is stable with small ceramic capacitors, allowing for a small overall solution size.

A smart enable input circuit with an internally controlled pulldown resistor keeps the LDO disabled even when the EN pin is unconnected and helps eliminate external components that are otherwise required to pull down the EN input.

The TPS7A21 is an ultra-small, low-dropout (LDO) linear voltage regulator that can source 500 mA of output current. The device provides low noise, high PSRR, and excellent load and line transient performance to meet the requirements of RF and other sensitive analog circuits. Innovative design techniques result in low-noise performance without the addition of an external noise bypass capacitor. With the device low quiescent current, the TPS7A21 is a good choice for battery-powered systems. The 2.0-V to 6.0-V input voltage range and 0.8-V to 5.5-V output voltage range support a variety of system requirements. The internal precision reference circuit enables excellent accuracy; the maximum output voltage tolerance is 1.5% over load, line, and temperature variations.

An internal soft-start circuit helps control the inrush current, thus minimizing the input voltage drop during start up. The LDO is stable with small ceramic capacitors, allowing for a small overall solution size.

A smart enable input circuit with an internally controlled pulldown resistor keeps the LDO disabled even when the EN pin is unconnected and helps eliminate external components that are otherwise required to pull down the EN input.
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類型 標題 日期
* Data sheet TPS7A21 500-mA, Low-Noise, Low-IQ, High-PSRR LDO datasheet (Rev. A) PDF | HTML 2022年 9月 21日
User guide TPS7A21EVM-059 User's Guide PDF | HTML 2021年 10月 8日

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開發板

TPS7A21EVM-059 — 適用 500-mA、低雜訊、超低 IQ、高 PSRR LDO 穩壓器的 TPS7A21 評估模組

TPS7A21 評估模組 (EVM) 可協助設計工程師評估 TPS7A21 線性穩壓器的運作及性能，以在其本身電路應用中使用。此 EVM 配置包含適合各種應用的單一低雜訊、小尺寸、低壓降 (LDO) 穩壓器。

該穩壓器能以低 VIN 至 VOUT 壓降電壓為負載提供最高 500 mA。爲了保持穩定，請使用 400 nF (或更大) 的最小降額輸出電容，最高可達 200 µF。

隨附高性能負載暫態電路，以改善 LDO 穩壓器的測量能力。

使用指南: PDF | HTML
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TPS7A21 PSpice Transient Model

SBVM976.ZIP (246 KB) - PSpice Model
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