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隔離式閘極驅動器

UCC21540

現行

採用 DW 或 DWK 封裝且具有雙輸入、DT 針腳和 8V UVLO 的 5.7kVrms 4A/6A 雙通道絕緣式閘極驅動器

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最新 UCC21550 現行 具有 IGBT 專用 DIS 和 DT 針腳的 4A/6A、5-kVRMS 雙通道隔離式閘極驅動器 Improved CMTI, faster VDD startup

UCC21540

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1414 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 1414 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1414 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 1414 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOIC (DWK) 14 106.09 mm² 10.3 x 10.3
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4-A peak source and 6-A peak sink output
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • CMTI greater than 100 V/ns
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delay matching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
    • 5700-VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4-A peak source and 6-A peak sink output
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • CMTI greater than 100 V/ns
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delay matching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
    • 5700-VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011

The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.

The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.

The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.

The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.
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UCC21542 現行 具有 8V UVLO 和 3.3mm 通道間距選項的 5.7kVRMS、4A/6A 雙通道絕緣式閘極驅動器 Non-Programmable deadtime version

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類型 標題 日期
* Data sheet UCC2154x Reinforced Isolation Dual-Channel Gate Driver With 3.3-mm Channel-to-Channel Spacing Option datasheet (Rev. D) PDF | HTML 2021年 1月 4日
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 2024年 2月 29日
White paper 以可靠且經濟實惠的隔離技術解決高電壓設計挑戰 (Rev. C) PDF | HTML 2024年 2月 15日
White paper Understanding failure modes in isolators (Rev. B) PDF | HTML 2024年 1月 29日
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 2024年 1月 25日
Certificate UCC21540 CQC Certificate of Product Certification 2023年 8月 17日
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021年 12月 16日
Certificate FPPT2 - Nonoptical Isolating Devices UL 1577 Certificate of Compliance 2021年 10月 26日
Certificate CQC19001226951 2021年 2月 5日
Test report Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design 2020年 4月 24日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 2019年 7月 22日
User guide Gate Drive Voltage vs. Efficiency 2019年 4月 25日
White paper Impact of an isolated gate driver (Rev. A) 2019年 2月 20日
EVM User's guide Using the UCC21540EVM 2018年 7月 27日
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 2018年 5月 16日
White paper Cities grow smarter through innovative semiconductor technologies 2017年 7月 7日
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 2016年 7月 5日

設計與開發

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開發板

UCC21540EVM — 具有 3.3mm 通道至通道間距的 5.0-kVrms 絕緣式雙通道閘極驅動器

UCC21540EVM is designed for evaluating UCC21540, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM serves as a reference design for driving power MOSFETs with up to 18V drive voltage, UCC21540 pin function identification, components (...)
使用指南: PDF
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模擬型號

UCC21540 PSpice Transient Model

SLUM656.ZIP (19 KB) - PSpice Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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