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UCC27512-EP

現行

採 SON 封裝且具 5-V UVLO 的強化型產品 4-A/8-A 單通道閘極驅動器

產品詳細資料

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -55 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating HiRel Enhanced Product Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -55 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating HiRel Enhanced Product Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
WSON (DRS) 6 9 mm² (3 mm × 3 mm)
  • Low-Cost, Gate-Driver Device Offering Superior Replacement
    of NPN and PNP Discrete Solutions
  • 4-A Peak Source and 8-A Peak Sink Asymmetrical Drive
  • Strong Sink Current Offers Enhanced Immunity Against Miller Turn On
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (ensures glitch free operation at
    power-up and power-down)
  • TTL and CMOS Compatible Input Logic Threshold,
    (independent of supply voltage)
  • Hysteretic Logic Thresholds for High Noise Immunity
  • Dual Input Design (choice of an inverting (IN- pin) or non-inverting
    (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted by VDD Pin
    Bias Supply Voltage
  • 6-Pin DRS (3mm × 3 mm WSON with exposed thermal pad) Package

Supports Defense, Aerospace, and Medical Applications

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C) Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

  • Low-Cost, Gate-Driver Device Offering Superior Replacement
    of NPN and PNP Discrete Solutions
  • 4-A Peak Source and 8-A Peak Sink Asymmetrical Drive
  • Strong Sink Current Offers Enhanced Immunity Against Miller Turn On
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (ensures glitch free operation at
    power-up and power-down)
  • TTL and CMOS Compatible Input Logic Threshold,
    (independent of supply voltage)
  • Hysteretic Logic Thresholds for High Noise Immunity
  • Dual Input Design (choice of an inverting (IN- pin) or non-inverting
    (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted by VDD Pin
    Bias Supply Voltage
  • 6-Pin DRS (3mm × 3 mm WSON with exposed thermal pad) Package

Supports Defense, Aerospace, and Medical Applications

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C) Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

The UCC27512 single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27512 is capable of sourcing and sinking high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27512 provides 4-A source, 8-A sink (asymmetrical drive) peak-drive current capability. Strong sink capability in asymmetrical drive boosts immunity against parasitic, Miller turn-on effect.

UCC27512 is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –55°C to 125°C. Internal Under Voltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power semiconductor devices.

The UCC27512 single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27512 is capable of sourcing and sinking high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27512 provides 4-A source, 8-A sink (asymmetrical drive) peak-drive current capability. Strong sink capability in asymmetrical drive boosts immunity against parasitic, Miller turn-on effect.

UCC27512 is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –55°C to 125°C. Internal Under Voltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power semiconductor devices.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 Single Channel High-Speed, Low-Side Gate Driver (With 4-A/8-A Peak Source/Sink). datasheet 2013/6/10
* 輻射及可靠性報告 UCC27512MDRSTEP Reliability Report 2016/2/9
應用說明 Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024/1/22
應用說明 Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 2023/9/8
應用說明 Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021/11/10
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/2/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/2/28
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019/1/18
Application brief Enable Function with Unused Differential Input 2018/7/11
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018/3/16

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