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CD74HCT75E ACTIVE

High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch

Inventory: 5,997
 

Download data sheet for CD74HCT75
  |   View additional information for CD74HCT75

Same as: CD74HCT75EE4 

Packaging information

Package | Pins PDIP (N) | 16
Operating temperature range (℃) M (-55 to 125)
Package qty | Carrier: 25 | TUBE
View more packaging information

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow N/A for Pkg Type
Material content View
DPPM / MTBF / Fit rate View
Qualification summary View
Ongoing reliability monitoring View
Device marking View

Features

  • True and Complementary Outputs
  • Buffered Inputs and Outputs
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

Description

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.

Qty Price
1-99 $0.76
100-249 $0.59
250-999 $0.43
1,000+ $0.31