Packaging information
Package | Pins TSSOP (PW) | 16 |
Operating temperature range (°C) -40 to 125 |
Package qty | Carrier 90 | TUBE |
Features for the SN74AHC595
- Operating range: 2V to 5.5V VCC
- 8-bit serial-in, parallel-out shift
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2000V human-body model (A114-A)
- 1000V charged-device model (C101)
Description for the SN74AHC595
The SN74AHC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state.