TIDEP0081

Wideband Receiver Design Using 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design

TIDEP0081

Design files

Overview

For wideband receiver system developers currently using FPGA or ASIC to connect High Speed data converters to a baseband processor, who need faster time to market with increased performance and significant reduction in cost, power, and size. This reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End Processing (DFE). Connecting ADC32RF80 to DAC38J84 provides an efficient solution for avionics and defense, test and measurements and industrial applications.

Features
  • Easy integration of signal processor to data converters over JESD204B
  • Usable bandwidth of two 75MHz channels or a single 100MHz channel when connected to ADC32RF80
  • DFE processing for filtering, down-sampling or up-sampling:  FFTC hardware accelerator to offload comput-intensive 2D FFT operation, achieving low latency and high accuracy
  • Wideband sampling with JESD attached signal processing solution including Digital Signal Processor (DSP), ADC and DAC boards, demo software, configuration GUIs and getting started guide
  • A robust demonstration and development platform including three EVMs, a deterministic latency card, schematic, BOM, user guide, benchmarks, software and demos

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUC85.PDF (1223 K)

Reference design overview and verified performance test data

TIDRNT2.PDF (6438 K)

Detailed schematic diagram for design layout and components

TIDRNT3.PDF (342 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRNT4.ZIP (10325 K)

Files used for 3D models or 2D drawings of IC components

Products

Includes TI products in the design and potential alternatives.

Buck converters (integrated switch)

TPS546204.5-V to 17-V, 6-A synchronous SWIFT™ buck converter

Data sheet document-pdfAcrobat PDF open-in-new HTML
Buck converters (integrated switch)

TPS654004.5 V to 18 V input, 4 A / 4 A / 2 A / 2 A synchronous quad converter with PMBus/I2C interface

Data sheet document-pdfAcrobat PDF open-in-new HTML
Clock jitter cleaners & synchronizers

LMK04828Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet document-pdfAcrobat PDF open-in-new HTML
Digital signal processors (DSPs)

66AK2L06Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

Data sheet document-pdfAcrobat PDF
High-speed DACs (>10MSPS)

DAC38J84Quad-Channel, 16-Bit, 2.5-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)

Data sheet document-pdfAcrobat PDF
I2C level shifters, buffers & hubs

PCA93062-bit bidirectional 400-kHz I2C/SMBus voltage level translator

Data sheet document-pdfAcrobat PDF open-in-new HTML
Load switches

TPS229135.5-V, 2-A, 60-mΩ load switch with output discharge

Data sheet document-pdfAcrobat PDF open-in-new HTML
Noninverting buffers & drivers

SN74LVC244A8-ch, 1.65-V to 3.6-V buffers with 3-state outputs

Data sheet document-pdfAcrobat PDF
Receivers

ADC32RF80Dual-channel, 14-bit, 3-GSPS, dual DDC/channel, RF-sampling wideband receiver and feedback IC

Data sheet document-pdfAcrobat PDF open-in-new HTML
USB power switches & charging port controllers

TPS2065C1.0A, 4.5-5.5V USB power switch, active-high enable, output discharge

Data sheet document-pdfAcrobat PDF open-in-new HTML

Technical documentation

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* Design guide Wideband Receiver With 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design Sep. 23, 2016

Related design resources

Software development

SOFTWARE DEVELOPMENT KIT (SDK)
BIOSLINUXMCSDK SYS/BIOS and Linux Multicore Software Development Kits (MCSDK) for C66x, C647x, C645x Processors PROCESSOR-SDK-K2L Processor SDK for 66AK2LX Processors - Linux and TI-RTOS support RFSDK Radio Frequency Software Developer Kit (RFSDK)

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