SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
A total of 15 destination channels are provided within the DMA for concurrent transfers from Tx per channel buffers to the various attached peripherals. Each Tx channel requires a single PSI-L thread. The Tx channels are allocated as in the following table.
Tx DMA Channel | Function | Channel Type | Trigger Mode | Data FIFO Address | Strobe MMR Address | Control FIFO Address |
---|---|---|---|---|---|---|
8000 | SPI 0 Tx Ch 0 | XY | edge | 000020100138 | 000000000000 | 000000000000 |
8001 | SPI 0 Tx Ch 1 | XY | edge | 00002010014C | 000000000000 | 000000000000 |
8002 | SPI 0 Tx Ch 2 | XY | edge | 000020100160 | 000000000000 | 000000000000 |
8003 | SPI 0 Tx Ch 3 | XY | edge | 000020100174 | 000000000000 | 000000000000 |
8004 | SPI 1 Tx Ch 0 | XY | edge | 000020110138 | 000000000000 | 000000000000 |
8005 | SPI 1 Tx Ch 1 | XY | edge | 00002011014C | 000000000000 | 000000000000 |
8006 | SPI 1 Tx Ch 2 | XY | edge | 000020110160 | 000000000000 | 000000000000 |
8007 | SPI 1 Tx Ch 3 | XY | edge | 000020110174 | 000000000000 | 000000000000 |
8008 | SPI 2 Tx Ch 0 | XY | edge | 000020120138 | 000000000000 | 000000000000 |
8009 | SPI 2 Tx Ch 1 | XY | edge | 00002012014C | 000000000000 | 000000000000 |
800a | SPI 2 Tx Ch 2 | XY | edge | 000020120160 | 000000000000 | 000000000000 |
800b | SPI 2 Tx Ch 3 | XY | edge | 000020120174 | 000000000000 | 000000000000 |
800c | MCAN 0 Tx Ch 0 | XY | pulse | 000002708000 | 0000027010D0 | 000000000000 |
800d | MCAN 0 Tx Ch 1 | XY | pulse | 000002708048 | 0000027010D0 | 000000000000 |
800e | MCAN 0 Tx Ch 2 | XY | pulse | 000002708090 | 0000027010D0 | 000000000000 |