SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
The procedure in Table 12-280 configures the DIT-specific subframe fields as part of the S/PDIF format data.
Step | Register/Bit Field/Programming Model | Value |
---|---|---|
Configure the valid bit value for odd time slots. | MCASP_DITCTL[3] VB | 0x- |
Configure the valid bit value for even time slots. | MCASP_DITCTL[2] VA | 0x- |
Configure the user data bit for each subframe A and B in a 384-slot S/PDIF block. | MCASP_DITUDRAi[31-0] DITUDRAi, where i = 0 to 5 MCASP_DITUDRBi[31-0] DITUDRBi, where i = 0 to 5 | 0x- 0x- |
Configure the channel status bit for each subframe A and B in a 384-slot S/PDIF block. | MCASP_DITCSRAi[31-0], where i = 0 to 5 MCASP_DITCSRBi[31-0], where i = 0 to 5 | 0x- 0x- |