SPRAD21E May 2023 – February 2024 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1
The processor provides 2 X USB2.0 interfaces that can be configured as host or device or DRD (Dual-Role Device).
USBn_VBUS (n=0..1) is recommended to be connected in accordance with the USB Design Guidelines section of the device-specific data sheet. The supply voltage range for the USBn_VBUS pins is defined in the Recommended Operating Conditions section of the device-specific data sheet. The nominal voltage value applied is equal to the resistor divider output when VBUS supply voltage level is 5 V.
USBn_ID functionality is supported via any of the processor GPIO.
USBn_VBUS are fail-safe inputs. The fail-safe input is valid only if the VBUS supply is connected through recommended USB VBUS Detect Voltage Divider / Clamp Circuit.