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Gate-Treiber
Isolierte Gate-Treiber

UCC21520

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5,7 kVrms 4 A/6 A zweikanaliger isolierter Gate-Treiber zwei Eingängen, Disable-Pin, 8V UVLO, im DW-

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Gleiche Funktionalität, gleiche Pinbelegung wie verglichener Baustein
NEU UCC21550 AKTIV Isolierter Zweikanal-Gate-Treiber mit 4 A/6 A, 5 kVRMS, DIS- und DT-Pins für IGBT Tighter VCCI range supporting digital controller thresholds. New DT equation. Increased CMTI and wider operating temperature range.

UCC21520

AKTIV
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Produktdetails

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Enable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Enable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5, 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • TTL and CMOS compatible inputs
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Industry standard wide body SOIC-16 (DW) package
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Operating temperature range –40 to +125°C
  • Switching parameters:
    • 19-ns typical propagation delay
    • 10-ns minimum pulse width
    • 5-ns maximum delay matching
    • 6-ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 100 V/ns
  • Surge immunity up to 12.8 kV
  • Isolation barrier life >40 years
  • 4-A peak source, 6-A peak sink output
  • TTL and CMOS compatible inputs
  • 3-V to 18-V input VCCI range to interface with both digital and analog controllers
  • Up to 25-V VDD output drive supply
    • 5-V and 8-V VDD UVLO options
  • Programmable overlap and dead time
  • Rejects input pulses and noise transients shorter than 5 ns
  • Fast disable for power sequencing
  • Industry standard wide body SOIC-16 (DW) package
  • Safety-related certifications:
    • 8000-VPK reinforced Isolation per DIN V VDE V 0884-11:2017-01
    • 5.7-kVRMS isolation for 1 minute per UL 1577
    • CSA certification per IEC 60950-1, IEC 62368-1, IEC 61010-1 and IEC 60601-1 end equipment standards
    • CQC certification per GB4943.1-2011

The UCC21520 and the UCC21520A are isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 and the UCC21520A enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21520 and the UCC21520A are isolated dual-channel gate drivers with 4-A source and 6-A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz with best-in-class propagation delay and pulse-width distortion.

The input side is isolated from the two output drivers by a 5.7-kVRMS reinforced isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500 VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 and the UCC21520A enable high efficiency, high power density, and robustness in a wide variety of power applications.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet UCC21520 4-A, 6-A, 5.7-kVRMS Isolated Dual-Channel Gate Driver datasheet (Rev. E) PDF | HTML 17 Dez 2021
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 29 Feb 2024
White paper Understanding failure modes in isolators (Rev. B) PDF | HTML 29 Jan 2024
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 25 Jan 2024
Technical article For efficiencies’ sake – how to integrate bidirectional power flow into your UPS design (part 1) PDF | HTML 11 Jan 2024
Certificate UCC215xx CQC Certificate of Product Certification 17 Aug 2023
Certificate UCC21520 CQC Certificate of Product Certification (Rev. A) 16 Aug 2023
Certificate UL Certification E181974 Vol 4. Sec 7 (Rev. C) 02 Dez 2022
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 Dez 2021
EVM User's guide Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) PDF | HTML 21 Okt 2021
E-book Ein Techniker-Leitfaden für Industrieroboter-Designs 25 Mär 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Certificate CSA Product Certificate (Rev. A) 15 Aug 2019
White paper Impact of an isolated gate driver (Rev. A) 20 Feb 2019
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 Mai 2018
Technical article For efficiencies’ sake – how to integrate bidirectional power flow (part 2) PDF | HTML 19 Sep 2017
Technical article Making a solar inverter more reliable than the sun PDF | HTML 01 Aug 2017
White paper Cities grow smarter through innovative semiconductor technologies 07 Jul 2017
Technical article Pile on to a charger – my EV needs power PDF | HTML 20 Dez 2016
Technical article Don't forget the gate driver: it’s the muscle PDF | HTML 20 Sep 2016
Technical article Staying cool, efficiently PDF | HTML 22 Aug 2016
Technical article How to reduce system cost in a three-phase IGBT-based inverter design PDF | HTML 08 Aug 2016
Technical article Why is the cloud isolated? PDF | HTML 18 Jul 2016
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 05 Jul 2016

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

TIEVM-VIENNARECT — Vienna-Gleichrichter-basiertes dreiphasiges Leistungsfaktorkorrektur-Evaluierungsmodul mit C2000™-MC

The Vienna rectifier power topology is used in high power three phase power factor (AC-DC) applications such as off-board electric vehicle (EV) chargers and telecom rectifiers. This design illustrates how to control the power stage using C2000™ MCUs. This design uses an HSEC180 controlCARD (...)
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Evaluierungsplatine

UCC21520EVM-286 — UCC21520 4A/6A isolierter Zweikanal-Gate-Treiber – Evaluierungsmodul

UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)

Benutzerhandbuch: PDF | HTML
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Simulationsmodell

UCC21520 PSpice Transient Model

SLUM544.ZIP (59 KB) - PSpice Model
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Simulationsmodell

UCC21520 TINA-TI Reference Design

SLUM552.TSC (168 KB) - TINA-TI Reference Design
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Simulationsmodell

UCC21520 TINA-TI Transient Spice Model

SLUM551.ZIP (23 KB) - TINA-TI Spice Model
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Simulationsmodell

UCC21520 Unencrypted PSpice Transient Model

SLUM543.ZIP (3 KB) - PSpice Model
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Berechnungstool

SLURAZ5 — UCC21520 Bootstrap Calculator 1.0

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The TIDA-01540 reference design reduces system cost and enables a compact design for a reinforced isolated 10kW three phase inverter. A lower system cost and compact form factor is achieved by using a dual gate driver in a single package and bootstrap configuration to generate floating voltages (...)
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TIDA-01159 — Kompakter, halbbrückenförmiger, verstärkter, isolierter Gate Drive – Referenzdesign

This reference design is a half-bridge isolated gated driver used in driving power stages of UPS, inverters, server and telecom applications. This reference design is based on the UCC21520 reinforced insulated gate driver and is capable of driving MOSFETs and SiC-FETs. The design (...)
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