UCD90120A

AKTIV

Stromversorgungssequenzer und Monitor für 12 Schienen mit ACPI-Unterstützung

Produktdetails

Supply voltage (min) (V) 3 Number of supplies monitored 13 Supply voltage (max) (V) 3.6 Iq (typ) (mA) 50 Number of sequenced outputs 12 Rating Catalog Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 3 Number of supplies monitored 13 Supply voltage (max) (V) 3.6 Iq (typ) (mA) 50 Number of sequenced outputs 12 Rating Catalog Operating temperature range (°C) -40 to 125
VQFN (RGC) 64 81 mm² 9 x 9
  • Monitor and Sequence 12 Voltage Rails
    • All Rails Sampled Every 400 µs
    • 12-bit ADC With 2.5-V, 0.5% Internal VREF
    • Sequence Based on Time, Rail and Pin Dependencies
    • Four Programmable Undervoltage and Overvoltage Thresholds per Monitor
  • Nonvolatile Error and Peak-Value Logging per Monitor (up to 12 Fault Detail Entries)
  • Closed-Loop Margining for 10 Rails
    • Margin Output Adjusts Rail Voltage to Match User-Defined Margin Thresholds
  • Programmable Watchdog Timer and System Reset
  • Flexible Digital I/O Configuration
  • Pin-Selected Rail States
  • Multiphase PWM Clock Generator
    • Clock Frequencies From 15.259 kHz to
      125 MHz
    • Capability to Configure Independent Clock Outputs for Synchronizing Switch-Mode Power Supplies
  • JTAG and I2C/SMBus/PMBus™ Interfaces
  • Monitor and Sequence 12 Voltage Rails
    • All Rails Sampled Every 400 µs
    • 12-bit ADC With 2.5-V, 0.5% Internal VREF
    • Sequence Based on Time, Rail and Pin Dependencies
    • Four Programmable Undervoltage and Overvoltage Thresholds per Monitor
  • Nonvolatile Error and Peak-Value Logging per Monitor (up to 12 Fault Detail Entries)
  • Closed-Loop Margining for 10 Rails
    • Margin Output Adjusts Rail Voltage to Match User-Defined Margin Thresholds
  • Programmable Watchdog Timer and System Reset
  • Flexible Digital I/O Configuration
  • Pin-Selected Rail States
  • Multiphase PWM Clock Generator
    • Clock Frequencies From 15.259 kHz to
      125 MHz
    • Capability to Configure Independent Clock Outputs for Synchronizing Switch-Mode Power Supplies
  • JTAG and I2C/SMBus/PMBus™ Interfaces

The UCD90120A is a 12-rail PMBus/I2C addressable power-supply sequencer and monitor. The device integrates a 12-bit ADC for monitoring up to 12 power-supply voltage inputs. Twenty-six GPIO pins can be used for power supply enables, power-on reset signals, external interrupts, cascading, or other system functions. Twelve of these pins offer PWM functionality. Using these pins, the UCD90120A offers support for margining, and general-purpose PWM functions.

Specific power states can be achieved using the Pin-Selected Rail States feature. This feature allows with the use of up to 3 GPIs to enable and disable any rail. This is useful for implementing system low-power modes and the Advanced Configuration and Power Interface (ACPI) specification that is used for hardware devices.

The TI Fusion Digital Power™ designer software is provided for device configuration. This PC-based graphical user interface (GUI) offers an intuitive interface for configuring, storing, and monitoring all system operating parameters.

The UCD90120A is a 12-rail PMBus/I2C addressable power-supply sequencer and monitor. The device integrates a 12-bit ADC for monitoring up to 12 power-supply voltage inputs. Twenty-six GPIO pins can be used for power supply enables, power-on reset signals, external interrupts, cascading, or other system functions. Twelve of these pins offer PWM functionality. Using these pins, the UCD90120A offers support for margining, and general-purpose PWM functions.

Specific power states can be achieved using the Pin-Selected Rail States feature. This feature allows with the use of up to 3 GPIs to enable and disable any rail. This is useful for implementing system low-power modes and the Advanced Configuration and Power Interface (ACPI) specification that is used for hardware devices.

The TI Fusion Digital Power™ designer software is provided for device configuration. This PC-based graphical user interface (GUI) offers an intuitive interface for configuring, storing, and monitoring all system operating parameters.

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Die aktuellste UCD90xxx PMBus™ Befehlsreferenz finden Sie unter https://www.ti.com/fusiondocs

Technische Dokumentation

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Typ Titel Datum
* Data sheet UCD90120A 12-Rail Power Supply Sequencer and Monitor With ACPI Support datasheet (Rev. C) PDF | HTML 09 Jun 2016
Application note How to Access UCD90XXX Sequencers GPIO PDF | HTML 16 Jun 2022
Application note How to Decode UCD90xxx Fault Log With PMBus (Rev. A) 07 Nov 2019
Application note Design Voltage Margining Circuit for UCD90xxx Power Sequencer and System Manager (Rev. A) 21 Mai 2019
Application note UCD90xxx Family Frequently Asked Questions and Answers (Rev. B) 12 Apr 2019
User guide UCD90xxx Sequencer and System Health Controller PMBus™ Command Reference (Rev. G) 03 Apr 2019
User guide UCD90xxx Sequencer Schematics Guidelines (Rev. C) PDF | HTML 24 Mär 2019
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Application note How to Cascade Multiple UCD90xxx Sequencers 10 Aug 2017
User guide Fusion Digital Power Designer GUI 7.0 for the UCD90xxx Sequencer 31 Mai 2017
Technical article Just the FPGA I was looking for… but how do I power it? PDF | HTML 09 Nov 2015
Analog Design Journal Analog Applications Journal 4Q 2014 24 Okt 2014
Analog Design Journal Power-supply sequencing for FPGAs 24 Okt 2014
Test report TI Power Reference Design for Xilinx® Artix®-7 (AC701) 12 Mai 2014
User guide PMP7977 User's Guide 11 Sep 2013
User guide TSW2200 Multi-Output Power Supply Board (Rev. A) 13 Dez 2012
Application note Monitoring Voltage, Current and Temperature Using the UCD9012x 23 Mär 2012
User guide UCD90SEQ64EVM-650: 64-Pin Sequencer Development Board 27 Dez 2010

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

UCD90SEQ64EVM-650 — Evaluierungsmodul für UCD90xxx 64-poligen Sequenzierer und Systemstatusmonitor

The UCD90SEQ64EVM-650 is a fully assembled and tested circuit for evaluating the 64-pin Sequencer and System Health Controller, including the UCD90120, UCD90124, UCD90120A, UCD90124A, UCD90910 and UCD90160.

Benutzerhandbuch: PDF
Anwendungssoftware und Frameworks

FUSION_DIGITAL_POWER_DESIGNER — Digitale Stromversorgungsoftware

Die grafische Benutzeroberflächensoftware (GUI) Fusion Digital Power™ wird dazu verwendet, digitale Stromversorgungscontroller und Sequenzer-/Gesundheitsmonitore von Texas Instruments zu konfigurieren und zu überwachen. Die Anwendung verwendet das PMBus-Protokoll zur Kommunikation mit dem Baustein (...)
Anwendungssoftware und Frameworks

FUSION_MFR_GUI — Fusion Digital Power-Herstellungs-Tool:

The Fusion Digital Power Manufacturing Tool (aka MFR GUI) is a Graphical User Interface used to download firmware, upgrade firmware, configure, calibrate and test .

The MFR GUI supports the same devices as Fusion Digital Power Designer software.  This tool is typically used in manufacturing (...)

Simulationsmodell

UCD90120A BSDL

SLVC496.ZIP (2 KB) - BSDL Model
Simulationsmodell

UCD90120A IBIS Model

SLVMCL8.ZIP (16 KB) - IBIS Model
Berechnungstool

SLVC676 UCD90xxx Voltage Margining Circuit Design Tool

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Test report: PDF
Schaltplan: PDF
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The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in  a compact, highly efficient design.  This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of (...)
Test report: PDF
Schaltplan: PDF
Referenzdesigns

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The PMP9444 reference design provides all the power supply rails necessary to power Xilinx's Kintex UltraScale family of FPGAs.  It features two UCD90120A's for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the (...)
Test report: PDF
Schaltplan: PDF
Referenzdesigns

PMP7977 — Xilinx Artix 7 FPGA mit PMBus-Power-Management – Referenzdesign

The Artix 7 power management reference design board uses power modules, linear regulators, and a PMBus compliant system controller to supply all required core and auxiliary voltages needed by the FPGA, including DDR memory termination. A Digital Power graphical user interface is used to monitor the (...)
Test report: PDF
Schaltplan: PDF
Gehäuse Pins Herunterladen
VQFN (RGC) 64 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

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