ADC1 incorporates two PGA output-voltage monitors. The monitors trigger an alarm if the PGA output is driven into overrange. The corresponding bits are set (= 1) in the data output status byte when an alarm is triggered. The PGA output voltage is monitored in two ways:
1) Differential: If the PGA differential output voltage exceeds either +105% or –105% FSR.
2) Absolute: If either PGA absolute output voltage is higher than VAVDD – 0.2 V or lower than VAVSS + 0.2 V.
The alarms automatically reset when the PGA is no longer in voltage overload. The monitors are fast-responding, analog, voltage-level comparators. Therefore, these monitors detect short-duration voltage overrange events that are not necessarily evident in the output as clipped codes because of averaging of the digital filter that may span one or more conversion cycles. Use the monitor function to detect certain type of faults (such as signal overranges, incorrect gain settings, sensor faults, input miswiring, and so on) without the need to change input configuration or interrupt readings.