SBOS998D June   2021  – July 2025 BUF802

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics Wide Bandwidth Mode
    6. 5.6 Electrical Characteristics Low Quiescent Current Mode
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output Overvoltage Clamp
      2. 7.3.2 Adjustable Quiescent Current
      3. 7.3.3 ESD Structure
    4. 7.4 Device Functional Modes
      1. 7.4.1 Buffer Mode (BF Mode)
      2. 7.4.2 Composite Loop Mode (CL Mode)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Oscilloscope Front-End Amplifier Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Transforming a Wide-Bandwidth, 50‑Ω Input Signal Chain to High-Input Impedance
        1. 8.2.2.1 Detailed Design Procedure
        2. 8.2.2.2 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Functional Modes

BUF802 Main Path and Auxiliary
                        PathFigure 7-8 Main Path and Auxiliary Path

The BUF802 is designed to operate in two modes: Buffer Mode (BF Mode) and Composite Loop Mode (CL Mode).

In BF Mode, the BUF802 uses the JFET, output driver and bipolar transistors in the Main Path to reproduce the signal, applied on IN, at the output of the BUF802. Figure 7-8 shows the Main Path and the Auxiliary Path of the BUF802. The BUF802 operates from dc to high-frequency, and is therefore usable as a standalone buffer. When used in BF Mode, only the Main Path of the BUF802 is used.

In CL Mode, the BUF802 uses the Auxiliary signal path and the Main Path to control the output voltage. As the name suggests in the Composite Loop Mode, the BUF802 is used in a composite loop with a precision amplifier to achieve dc precision and a wide, large-signal bandwidth simultaneously. The composite loop splits the applied signal to low-frequency and high-frequency components and passes the signal over to different circuits with an appropriate transfer function. The low-frequency and high-frequency signal components then recombine inside the BUF802 and are reproduced at the OUT pin.